Strengthening the collaborative ecosystem: SoC FPGA becomes a powerful weapon

Publisher:心灵舞动Latest update time:2013-11-05 Keywords:SoC  FPGA Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere

Altera intends to gradually strengthen FPGA co-processors through more advanced process technology and closer industry cooperation, significantly improve the overall performance of SoC FPGA, and create greater differentiation advantages for seizing the embedded system market. As the penetration rate of SoC FPGA in the embedded system market rises rapidly, FPGA manufacturers have developed more competitive SoC FPGAs, innovated ASIC-level programmable architectures, and strengthened exchanges with SoC partners, intending to create a more complete SoC ecosystem and aggressively attack the embedded system application market.

  "Altera SoC FPGAs connect ARM dual-core processors with the advanced technology of Altera SoC FPGAs, using dual-core ARM Cortex-A9 MPCore processors and hard-core memory controllers and peripherals to establish high-performance interconnection between the processor system and FPGAs," said Xie Xiaodong, product marketing manager for the Asia Pacific region at Altera. "Altera SoC platforms help meet the stringent requirements of embedded engineers for system performance, system power consumption, circuit board area, and system cost."

Xie Xiaodong, Product Marketing Manager, Asia Pacific, Altera
Xie Xiaodong, Product Marketing Manager, Asia Pacific, Altera

  Unlike other FPGA manufacturers who focus on FPGA product development strategy, Altera not only maintains the premise of developing high-performance products, but also attaches importance to the support of SoC partners. Xie Xiaodong further pointed out that many embedded operating systems and development tools have announced support for Altera SoC FPGA. Although Altera is a latecomer in the embedded field, it is willing to serve as a platform to aggregate more embedded development partners.

Undoubtedly, the support of Altera SoC partners provides more complete guarantee for the application of SoC in the embedded system market.

  Undoubtedly, the support of Altera SoC partners provides more complete guarantee for the application of SoC in the embedded system market.

  The ARM DS-5 Altera Edition Toolkit provides embedded software developers with unprecedented full-chip visualization and control capabilities through the standard DS-5 user interface. In addition, it is also helpful in eliminating the debugging barriers of integrating dual-core processor subsystems with the FPGA architecture in Altera SoCs.

  As R&D cases become increasingly complex, SoC FPGA helps Altera meet the stringent requirements of embedded engineers for system performance, system power consumption, circuit board area and system cost. Fuji Software's Android operating system expands the advantages of the SoC platform, realizes networking functions, and brings more operability and flexibility to embedded engineers. QNX's QNX system has advantages in smoothness and graphic display, and can also run Android virtual machines. This combined with Fuji Software's Android operating system can help embedded engineers bring more applications. In addition, Lauterbach's debugger and compiler products and McTai Technology's uC/OS-II, uC/OS-III, and GNU compiler tools have brought various differentiated support to the Altera SoC platform.

  In fact, the strong alliance between embedded system software vendors and FPGA vendors is an inevitable trend, and is also the differentiation of FPGA vendors in successfully entering the embedded system market. When the FPGA architecture reaches a certain level, it makes sense to use software to ensure that the entire system is more stable, achieve greater differentiation, expand innovation in application areas, and accelerate the division of the market share of ASIC, ASSP and DSP suppliers in embedded systems.

Keywords:SoC  FPGA Reference address:Strengthening the collaborative ecosystem: SoC FPGA becomes a powerful weapon

Previous article:FPGA Design Tips: How to Use FPGA Clock Resources Correctly
Next article:ARM uses a unique survival model to cope with the melee of giants such as Intel

Recommended ReadingLatest update time:2024-11-15 11:33

Implementation of Multi-Waveform Radar Echo Intermediate Frequency Simulator Based on DSP and FPGA
This paper discusses the design and implementation method of the intermediate frequency part of an autonomous radar echo simulator. The simulator can generate radar echo signals of various waveforms such as pulse single frequency, pulse linear frequency modulation, step frequency, step frequency + linear frequency mod
[Embedded]
Implementation of Multi-Waveform Radar Echo Intermediate Frequency Simulator Based on DSP and FPGA
ARM-FPGA DuPont line inter-chip transmission--high-speed data crosstalk
Inter-chip transmission--high-speed data crosstalk I have been debugging something these days. The FSMC of STM32 transmits data to the VGA controller made by Bingo. Since there is no direct connection to the board, the boards are connected with Dupont wires. The FMSC transmission mode is the fastest speed. The FSMC
[Microcontroller]
ARM-FPGA DuPont line inter-chip transmission--high-speed data crosstalk
Design of I2C SLAVE Mode Bus Based on FPGA
As FPGA is increasingly used in embedded system development, some embedded CPUs, such as STM32, do not have a dedicated CPU read/write bus to reduce costs and package size, but only provide some interfaces such as SPI and I2C. In addition, in applications, data often needs to be configured in FPGA, such as application
[Power Management]
Design of I2C SLAVE Mode Bus Based on FPGA
FPGA with advanced algorithms accelerates the development of inverters
  As inverters shift to a three-level topology, the difficulty of system control has increased significantly. Therefore, major European and American inverter manufacturers have begun to switch to system-on-chip field-programmable gate arrays (SoC FPGAs), thereby introducing more advanced digital algorithms to further
[Power Management]
FPGA with advanced algorithms accelerates the development of inverters
Electronic Technology Decrypted: Simplifying FPGA Power Supply Design
  FPGA is a chip with multiple power requirements, mainly three types of power requirements:   1.Vccint core operating voltage   Generally, the voltage is very low, and the commonly used FPGAs are around 1.2V. To power various internal logics of the FPGA, the current ranges from several hundred milliamperes to several
[Power Management]
Electronic Technology Decrypted: Simplifying FPGA Power Supply Design
Maximizes runtime of automotive battery packs even with aging cells
Large battery packs consisting of series-connected, high-energy-density, high-peak-power lithium polymer or lithium iron phosphate (LiFePO4) cells are commonly used in all-electric (EV or BEV), hybrid gas/electric vehicles (HEV and plug-in hybrid electric vehicles or PHEV), and even energy storage systems (ESS). It i
[Automotive Electronics]
Maximizes runtime of automotive battery packs even with aging cells
Using AVR microcontroller to configure FPGA
Altera's ACEX, FLEX and other series of FPGA chips are widely used, but their FPGAs are based on SRAM structures, and the programming data that determines the logic functions of the circuits is stored in the SRAM. Due to the volatility of SRAM, the programming data must be reloaded into SRAM every time the power is
[Microcontroller]
Using AVR microcontroller to configure FPGA
In FPGA Design, Timing is Everything
  When your FPGA design fails to meet timing, the reason may not be obvious. The solution not only relies on using FPGA implementation tools to optimize the design to meet timing requirements, but also requires the designer to have clear goals and the ability to diagnose/isolate timing problems. Designers now have som
[Power Management]
Latest Analog Electronics Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号