TI C6000 CodecEngine integrated algorithm core calling principle
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This post was last edited by Baboerben on 2019-12-15 21:07
The C6000 series DAVINCI is a dual-core: ARM+DSP or ARM+DSP+other GPP architecture. The proprietary algorithm can be integrated into the CodecEngine
The algorithm runs on the DSP side, and the DSP algorithm (MOD_PROCESS) is called in ARM or GPP. CodecEngine is an algorithm-
integrated architecture with a multi-core architecture (it can also be used on a single core), supporting TI's xDM and Non-xDM standard algorithms. Calling an algorithm is done by executing a
MOD_PROCESS() function when the algorithm is running, and
calling the MOD_PROCESS() on the DSP side through the VISA function (abstract interface for video, image, speech, and audio processing) in ARM or GPP. The calling principle is described as follows: TI C6000 CodecEngine integrated algorithm core calling principle
C6000 series DAVINCI is a dual-core: ARM+DSP or ARM+DSP+other GPP architecture. Your own algorithm can be integrated into CodecEngine
The algorithm runs on the DSP side, and the DSP algorithm (MOD_PROCESS) is called in ARM or GPP. CodecEngine is an algorithm-
integrated architecture with a multi-core architecture (it can also be used on a single core), supporting TI's xDM and Non-xDM standard algorithms. Calling an algorithm is done by executing a
MOD_PROCESS() function when the algorithm is running, and calling the MOD_PROCESS() on the DSP side in ARM or GPP through the VISA function (abstract interface for video, image, speech, and audio processing)
. The calling principle is described as follows: C6000 series DAVINCI is a dual-core: ARM+DSP or ARM+DSP+other GPP architecture. Own algorithms can be integrated into CodecEngine
TI C6000 CodecEngine integrated algorithm core calling principle
The C6000 series DAVINCI is a dual-core: ARM+DSP or ARM+DSP+other GPP architecture. The proprietary algorithm can be integrated into the CodecEngine
The algorithm runs on the DSP side, and the DSP algorithm (MOD_PROCESS) is called in ARM or GPP. CodecEngine is an algorithm
integration architecture of a multi-core architecture (it can also be on a single core), supporting TI's xDM and Non-xDM standard algorithms. Calling the algorithm is to execute a
MOD_PROCESS() function when the algorithm is running, and call the MOD_PROCESS() on the DSP side through the VISA function (abstract interface for video, image, speech, and audio processing) in ARM or GPP
. The calling principle is described as follows:
Since DSP and GPP use shared memory, we must pay attention to cache cohrerence issues:
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