Home > Other > FPGA chip minimum system circuit design guide - circuit diagrams read every day (103)

FPGA chip minimum system circuit design guide - circuit diagrams read every day (103)

Source: InternetPublisher:JFET Updated: 2021/12/31

FPGA is the abbreviation of English Field Programmable Gate Array, that is, field programmable gate array. FPGA uses its field programmable characteristics to integrate the original circuit board-level products into chip-level products, reducing the size, shortening the system development cycle, and facilitating system upgrades. It has large capacity and strong logic functions, improves the stability of the system, and simultaneously It has high speed and high reliability. In digital system design, it can be completely configured and programmed by the user through software to complete a specific function. What we want to study is a FLEX10K series chip launched by Altera. By learning the working principle and usage characteristics of the chip, we can design a minimum system based on the FLEX10K chip. Through the design of this minimum system, everyone can better understand FPGA. And it has a strong interest in it, making it a good start for more people who want to learn about FPGA.

Reset and crystal oscillator circuit schematic design

A chip, especially a programmable chip, usually requires a short period of time to initialize internal parameters at the moment of power-on. At this time, the chip cannot immediately enter the working state. These tasks of power-on initialization are usually called reset, and the circuit that completes this function is called a reset circuit. This FPGA chip uses a low-level reset, which supports power-on reset and manual reset. A low-level is generated after RESET is pressed.

FPGA chip minimum system circuit design guide - circuit diagrams read every day (103)

Figure 4-2 Reset circuit schematic design

Crystal oscillator is a component that provides a frequency reference for the circuit. It is usually divided into two categories: active crystal oscillator and passive crystal oscillator. Passive crystal oscillator requires an oscillator inside the chip, and the signal voltage of the crystal oscillator depends on the starting circuit, allowing different Voltage, but passive crystal oscillators usually have poor signal quality and accuracy and need to accurately match peripheral circuits (inductors, capacitors, resistors, etc.). If the crystal oscillator needs to be replaced, the peripheral circuits must be replaced at the same time. Active crystal oscillators do not require the chip's internal oscillator, can provide a high-precision frequency reference, and have better signal quality than passive crystal oscillators. This FPGA chip uses a 50MHZ active chip crystal oscillator as the clock input for chip operation (Figure 4-3).

FPGA chip minimum system circuit design guide - circuit diagrams read every day (103)

Figure 4-3 Crystal oscillator circuit schematic design

Buzzer circuit schematic design

The circuit is very simple. It should be noted that the development board uses a high-quality buzzer, which requires pulses to control its sound. The transistor in the circuit diagram is used as a switch. When the driving capability provided by the I/O is not enough, the transistor can enhance the driving capability. Active low (Figure 4-4).

FPGA chip minimum system circuit design guide - circuit diagrams read every day (103)

Figure 4-4 Buzzer circuit schematic design

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