ARM-FPGA DuPont line inter-chip transmission--high-speed data crosstalk

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Inter-chip transmission--high-speed data crosstalk


I have been debugging something these days. The FSMC of STM32 transmits data to the VGA controller made by Bingo. Since there is no direct connection to the board, the boards are connected with Dupont wires. The FMSC transmission mode is the fastest speed. The FSMC write timing is shown in the figure below. The fastest speed reaches 72M (HCLK). But I used Dupont wires. There is no other way... Magical things keep happening. Ghosts are always around. I would like to share my experience with you, although I only know the basics.


The following figure shows the connection of Dupont wire between STM32 and FPGA in my project. The Dupont wire is 20cm, and the maximum HCLK of FSMC is 72MHz. From right to left, they are D0-D15, CS, RS, WR, RD

First, I will post the chat records when the noble people helped me. The summary of everyone's experience is worth sharing:












High-speed bias transmission, summarized as follows:


(1) The DuPont line cannot be too long


(2) If the interference is large, you can add capacitors to avoid data crosstalk.


(3) The power supply needs to be stable, add decoupling capacitors


(4) Electromagnetic interference


(5) When the jump is huge, there will be interference. Isolate or separate the data line from the signal line.


(6) Asynchronous data must first be latched by a D flip-flop


(7) The jump board from Ffff to 0000 is too large, causing too much interference


solution:


I began to believe that it was a problem with the STM32 code, so I tested the code. The following is the test code I wrote, with 1024*768 data.


void LCD_ColorTest2(void)


{


u16 i,j;


LCD_Write_Address(0,0);//reset ram addr


LCD_WriteData_Begin();//Begin to Write data


for(i=0;i<768;i++)


{


for(j=0;j<1024;j++)


LCD_WriteData(i*j);


}


LCD_WriteData_End();


}


Every time it crashes at 2/3 of the screen, I finally found that at 2/3 of the screen, DATA=512*1024-1=ffff, the next data bit is 0000, the problem is here, because of the jump, the interference is too great, just as the chat record said, so I separated WR and RS and connected them to the pins on the side with the same function (fortunately the IO on the side also reserved FSCM IO). In this way, the signal line and the data line are separated, and strangely, the image transmission is complete, and there is no data loss. As shown in the figure below, the yellow is the WR and RS signal lines after the change.


I remember when I was drawing boards in the lab, high-speed communications, Ethernet, RFID, etc., signal lines had to be isolated with GND, and Dupont wires were the worst. I remember the 900M RF board back then, which was really a loss.

Reference address:ARM-FPGA DuPont line inter-chip transmission--high-speed data crosstalk

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