Total of 4 lessons6 hours and 48 minutes and 28 seconds
This set of courses is a recorded course of Xiaomei’s field training class in 2019. It is rich in content, high in knowledge, and carefully edited, so the viewing experience is good. The course arrangement is divided into a foundation solidification stage, a system modeling stage, and an example strengthening stage.
Total of 70 lessons1 days and 11 hours and 37 minutes and 41 seconds
This series of teaching videos will lead you from scratch to master HLS and UltraFAST design methods from scratch, step by step, to help you become a master of system design and algorithm acceleration! This course includes five topics: the design process of Vivado HLS, coding style when describing algorithms in C or C++, optimization methods of for loops, optimization methods of arrays, and implementation of input/output ports.
Total of 23 lessons4 hours and 38 minutes and 6 seconds
Basic operations of QuartusⅡ software, introduction to VHDL syntax, FPGA design examples and NiosⅡ design examples. First, the basic operations of Quartus II are introduced, including FPGA design such as project creation, code editing, schematic design, VHDL code design, simulation, and downloading of FPGA configuration files. Afterwards, the basic syntax of VHDL is introduced in detail, and VHDL knowledge points are introduced one by one with VHDL program examples, so that readers can be freed from the complex VHDL syntax. Then, using examples as the starting point, from simple to complex, the modeling of combinational circuits, sequential circuit modeling, and the design of comprehensive examples are introduced. Next, in the explanation of Nios II, the temperature sensing system based on DS18820 and the clock real-time display system based on PCF8563.
Total of 22 lessons8 hours and 30 seconds
Total of 30 lessons21 hours and 25 minutes and 16 seconds
Total of 5 lessons1 hours and 31 minutes and 51 seconds
FPGA software and hardware co-design
Total of 35 lessons1 days and 3 hours and 17 minutes and 36 seconds
On-point Atomic Navigator ZYNQ video first issue FPGA design chapter Navigator V2
Total of 125 lessons2 days and 5 hours and 58 minutes and 11 seconds
The necessary peripheral circuits required for FPGA operation are explained in detail, including: power supply, clock, configuration circuit, and some commonly used peripheral circuits are introduced.
Total of 5 lessons48 minutes and 21 seconds
The "Programmable ASIC Design" course is a practical course focusing on the development of field programmable gate array (FPGA) device design methods. With the development of integrated circuits, programmable ASIC design has become a necessary means for experimental and practical courses on digital circuit systems and digital signal processing. The course study focuses on the development of the popular DE series motherboards at home and abroad. It teaches the internal resource structure of FPGA, carries out the study of Verilog HDL language, and uses EDA software such as QuartusII to carry out case study of digital logic circuits, signal processing and SOPC system design.
Total of 32 lessons6 hours and 26 minutes and 44 seconds
Milianke miz702 video for fresh man, describing the development environment, ZYNQ GPIO, ADC, DDR, AXI, etc.
Total of 22 lessons7 hours and 35 minutes and 54 seconds
The video explains the use of NIOS ii through practical projects of hello world, PIO, UART, and SDRAM.
Total of 7 lessons3 hours and 51 minutes and 54 seconds
"Verilog HDL Design and Practice" is divided into four parts: basic operations of the ModelSim simulation tool and QuartusⅡ development tool, Verilog HDL syntax introduction, FPGA example design and NiosⅡ example design based on Qsys. First, the basic operations of QuartusII are introduced, including project creation, code editing, schematic design, VerilogHDL code design, waveform simulation based on QuartusII and ModelSim, and downloading of FPGA configuration files and other basic operations related to FPGA design. Then, the basic syntax of VerilogHDL is introduced one by one in the form of VerilogHDL knowledge points with VerilogHDL program examples. Then, using examples as the starting point, from simple to complex, the modeling of combinational circuits, sequential circuit modeling and the design of comprehensive examples are introduced.
Total of 26 lessons8 hours and 2 seconds
Virtex-5 Power Consumption Estimation and Measurement Demonstration
Total of 1 lessons33 minutes and 7 seconds
Xilinx FPGA development board image and its digital processing
Total of 25 lessons4 hours and 29 minutes and 58 seconds
Total of 19 lessons19 hours and 48 minutes and 40 seconds
With the advancement of technology, the application scenarios of FPGA are becoming wider and wider, from the previous fields of control and communication to the fields of parallel accelerated computing, artificial intelligence algorithm acceleration, etc. However, no matter the ever-changing applications, timing constraints are the most important in FPGA. One of the links, it is also the blind spot of many FPGA engineers. This tutorial explains in detail the various timing constraint theories of FPGA, and takes an actual Vivado project as an example to carry out timing constraints step by step, and finally achieve timing closure.
Total of 14 lessons1 hours and 34 minutes and 54 seconds
Black gold ZYNQ FPGA video tutorial
Total of 67 lessons22 hours and 15 minutes and 31 seconds
Based on Xilinx's Artix-7FPGA device and a variety of entry-level and advanced peripherals. The video has a total of 37 lessons, with a total duration of about 800 minutes. It provides some typical engineering examples to help learners learn from FPGA basic knowledge, logic design concepts, tool configuration and use, design source code writing, design functional principles, simulation verification, and board-level design. Gain a solid grasp of FPGA development in aspects such as debugging and debugging.
Total of 38 lessons12 hours and 54 minutes and 18 seconds
Wildfire Journey Series Development Board Supporting Video Tutorial
Total of 175 lessons2 days and 22 hours and 48 minutes and 2 seconds
Verilog HDL digital integrated circuit design principles and applications Cai Jueping and He Xiaochuan lectured by Cai Jueping and Li Zhenrong of Xi'an University of Electronic Science and Technology
Total of 30 lessons21 hours and 25 minutes and 16 seconds
This course introduces in detail the use of Xilinx's new generation development platform Vivado. It is divided into two parts: introductory part and advanced part; it covers four major topics: design process, timing constraints (XDC), design analysis and the use of Tcl scripts; attached Multiple project demos. The design concept of Vivado "IP Centric" runs through it, and the demo shows the powerful functions of Vivado and the differences from ISE.
Total of 41 lessons13 hours and 51 minutes and 12 seconds
Introduced the functions and usage of Quartus Prime, explained the development process based on hardware description language, and demonstrated the development process with practical examples.
Total of 2 lessons31 minutes and 53 seconds
FPGA is a field programmable gate array. It is a digital logic device that can change the existing logic functions of FPGA through reprogramming. It mainly consists of logic resources, clock resources, embedded memory, multipliers, programmable IO, etc. composition.
Total of 2 lessons27 minutes and 50 seconds
This series of courses originates from Intel FPGA online training courses and mainly talks about the basic knowledge of FPGA. By studying this course, you can better master the basics of FPGA.
Total of 18 lessons10 hours and 43 seconds
H.265 Video Encoder IP Core is an open source H.265 hardware video encoder that implements most of the functions of H.265 (or HEVC). It was developed by the research team of Professor Fan Yibo of the Video Image Processing Laboratory (VIP Lab) of the State Key Lab of ASIC & System, Fudan University, and is open source. Any organization or individual can use the above code for research and production purposes free of charge, and VIP Lab will continue to update and maintain the development of the H.265 hardware video encoder.
Total of 8 lessons2 hours and 4 minutes and 36 seconds
Total of 2 lessons2 hours and 12 minutes and 48 seconds
About the speaker: Wang Minzhi, who has worked in many scientific research institutes and has been engaged in research and development work in radar, communications and medical electronics. Participated in the research and development of many types of shipborne radars, mainly responsible for the development of digital circuits. The current research directions are digital medical development, digital signal processing part of PET and TDC implementation based on FPGA. His work "In-depth Understanding of Altera FPGA Application Design" is highly praised by engineers and has a good reputation.
Total of 3 lessons1 hours and 16 minutes and 0 seconds
Huaqing Vision Training Tutorial, Real-time Linux Technology: How to apply real-time features in embedded LINUX Embedded Linux Optimization: Accelerate the process of system startup and application startup Embedded system boot program transplantation of FPGA DSP application C6000 DSP software development environment CCS Introduction to FPGA Typical application areas and solutions
Total of 6 lessons5 hours and 48 minutes and 18 seconds
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