Programmable ASIC Design (Sichuan University)

Programmable ASIC Design (Sichuan University)

ASICVerilog

The "Programmable ASIC Design" course is a practical course focusing on the development of field programmable gate array (FPGA) device design methods. With the development of integrated circuits, programmable ASIC design has become a necessary means for experimental and practical courses on digital circuit systems and digital signal processing. The course study focuses on the development of the popular DE series motherboards at home and abroad. It teaches the internal resource structure of FPGA, carries out the study of Verilog HDL language, and uses EDA software such as QuartusII to carry out case study of digital logic circuits, signal processing and SOPC system design.

Total of 32 lessons6 hours and 26 minutes and 44 seconds

IC back-end design

IC back-end design

SoCASICICrear end

Total of 6 lessons6 hours and 8 minutes and 42 seconds

IC front-end design

IC front-end design

SoCASICIC

Total of 7 lessons9 hours and 8 minutes and 25 seconds

verilog HDL digital integrated circuit design principles and applications

verilog HDL digital integrated circuit design principles and applications

FPGAASICVerilog

Verilog HDL digital integrated circuit design principles and applications Cai Jueping and He Xiaochuan lectured by Cai Jueping and Li Zhenrong of Xi'an University of Electronic Science and Technology

Total of 30 lessons21 hours and 25 minutes and 16 seconds

Good design methods and misunderstandings in FPGA design

Good design methods and misunderstandings in FPGA design

FPGAEmbeddedASICCyclone

Good design methods and misunderstandings in FPGA design

Total of 3 lessons1 hours and 2 minutes and 52 seconds

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