• Duration:58 minutes and 46 seconds
  • Date:2024/09/02
  • Uploader:宋元浩
Introduction
keywords: SoC
SoC Design Laboratory

Course Overview:
This course is designed to equip participants with the skills and knowledge required to become full-stack IC designers, capable of handling all development stages from front-end design to system debugging and embedded programming. After completing the course, participants will have the skills and knowledge to design SoC chips from concept to production, and achieve the following learning objectives:
1. Learn Verilog and HLS design implementation on FPGA and ASIC;
2. Implement IP and integrate it into SoC design;
3. Implement SoC design and verify it in FPGA;

This course is based on Google Open-Source Silicon Program, and the experiment uses Efabless Caravel Harness SoC. In this course, we will use Caravel SoC Harness and Caravel SoC FPGA verification platform.

Course Content:
Design Method
1. Introduction to HLS and Tools
2. Verilog & Logic Design
3. Caravel SoC
4. Processor
5. Memory
6. Peripheral
7. Embedded Programming
8. SoC - Interconnect
9. Static Timing Analysis
10. Synthesis & Optimization
11. Verification & Simulation

Design Process Tools
1. Tools – Tcl, Perl, Makefile
2. FPGA Flow -Xilinx Vivado
3. Simulator
4. Synthesis
5. Timing Analysis
6. Verification MethodologyExperiment

1.
Vivado Tool Installation
2. HLS - FIR Filter (AXI Master, AXI Stream)
3. Caravel SoC Simulation
4. Caravel SoC FPGA
5. SoC Design Labs: Interrupt, User RAM, UART, SDRAM
6. Workload Optimized SoC (WLOS) Baseline
7. Final Project
Unfold ↓

You Might Like

Recommended Posts

How to disable the operation of the lower window of the messagebox prompt box?
As the title says, I solved the problem of how to prevent the messagebox from being covered yesterday. Today I encountered the problem that after the messagebox prompt box appears, I can still operate
378903745 Embedded System
How to remove click screen sound
How to change the sound of clicking the screen in EVC by modifying the program. I modified the registry, but it didn't work. . The code is as follows. HKEY hKey1; DWORD dwType1; DWORD dwScreen1 = 1; D
kccch Embedded System
WinCE5 implements PPPOE dial-up, which modules and registry need to be configured in the kernel?
As the title says, I have added Ras/PPP, PPPoE, Tapi, etc., and createdin . When dialing, it prompts: Remote concentrator is not responding... I captured the packets and compared them with the PC. I f
qiyuan775 Embedded System
iPhone backup solution
iPhone backup solution module, can be made into data cable, charger, adapter, power bank, power strip, etc.
cto Mobile and portable
Looking for someone to teach me how to program a microcontroller
I am new here and have a little interest in single-chip microcomputers. I have learned C language, digital electronics, and analog electronics, but not single-chip microcomputers. I participated in an
chaolong Talking
Can I use FPGA/CPLD for my graduation project?
I would like to ask you experts, I am a newbie, but I want to develop in the field of FPGA. Now I want to do a graduation project on this aspect, which requires a combination of software and hardware.
海阔更天空 FPGA/CPLD

Recommended Content

可能感兴趣器件

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号