【Embedded Development】 ARM Assembly (Instruction Classification | Pseudo-instructions | Coprocessor Access Instructions)

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Pseudo-instruction introduction:

-- Function of pseudo-instructions: data is used to define the data segment, indicating that the following data is stored in the data segment; acsii indicates the string variable type, byte indicates the byte type variable, and word indicates the word type variable;


Code example:

-- Assembly code: start.S;


.data @define data variables
hello: @ indicates the variable address, string variable
.ascii "Hello World!"
bh: @ indicates the variable address, byte variable
.byte 0x1
ADD: @ indicates the variable address, word variable
.word 0xff

.text
.global _start
_start:

mov r0, #0xff

-- make script: Makefile;


all: start.o 
	arm-linux-ld -Ttext 0x50008000 -o start.elf start.o
	
start.o : start.S
	arm-linux-gcc -g -o start.o -c start.S
	
.PHONY: clean
clean:
	rm *.o *.elf *.bin


Analyze elf file: Use arm-linux-readelf -a start.elf command to analyze the start.elf file;

-- .data segment address: Note that the .data address in [2] is 0x50010004;


-- Data variables:


-- Full text of elf file analysis:


octopus@octopus:~/arm/demo$ arm-linux-readelf -a start.elf

ELF Header:

Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00

Class: ELF32

Data: 2's complement, little endian

Version: 1 (current)

OS/ABI: UNIX - System V

ABI Version: 0

Type: EXEC (Executable file)

Machine: ARM

Version: 0x1

Entry point address: 0x50008000

Start of program headers: 52 (bytes into file)

Start of section headers: 33100 (bytes into file)

Flags: 0x5000002, has entry point, Version5 EABI

Size of this header: 52 (bytes)

Size of program headers: 32 (bytes)

Number of program headers: 2

Size of section headers: 40 (bytes)

Number of section headers: 11

Section header string table index: 8


Section Headers:

[Nr] Name Type Addr Off Size ES Flg Lk Inf Al

[0] NULL 00000000 000000 000000 00 0 0 0

[1] .text PROGBITS 50008000 008000 000004 00 AX 0 0 4

[2] .data PROGBITS 50010004 008004 000012 00 WA 0 0 1

[3] .debug_aranges PROGBITS 00000000 008018 000020 00 0 0 8

[4] .debug_info PROGBITS 00000000 008038 000048 00 0 0 1

[5] .debug_abbrev PROGBITS 00000000 008080 000014 00 0 0 1

[6] .debug_line PROGBITS 00000000 008094 000037 00 0 0 1

[7] .ARM.attributes ARM_ATTRIBUTES 00000000 0080cb 000014 00 0 0 1

[8] .shstrtab STRTAB 00000000 0080df 00006c 00 0 0 1

[9] .symtab SYMTAB 00000000 008304 000180 10 10 13 4

[10] .strtab STRTAB 00000000 008484 000087 00 0 0 1

Key to Flags:

W (write), A (alloc), X (execute), M (merge), S (strings)

I (info), L (link order), G (group), x (unknown)

O (extra OS processing required) o (OS specific), p (processor specific)


There are no section groups in this file.


Program Headers:

Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align

LOAD 0x008000 0x50008000 0x50008000 0x00004 0x00004 RE 0x8000

LOAD 0x008004 0x50010004 0x50010004 0x00012 0x00012 RW 0x8000


Section to Segment mapping:

Segment Sections...

00 .text

01.data


There is no dynamic section in this file.


There are no relocations in this file.


There are no unwind sections in this file.


Symbol table '.symtab' contains 24 entries:

Num: Value Size Type Bind Vis Ndx Name

0: 00000000 0 NOTYPE LOCAL DEFAULT UND

1: 50008000 0 SECTION LOCAL DEFAULT 1

2: 50010004 0 SECTION LOCAL DEFAULT 2

3: 00000000 0 SECTION LOCAL DEFAULT 3

4: 00000000 0 SECTION LOCAL DEFAULT 4

5: 00000000 0 SECTION LOCAL DEFAULT 5

6: 00000000 0 SECTION LOCAL DEFAULT 6

7: 00000000 0 SECTION LOCAL DEFAULT 7

8: 50010004 0 NOTYPE LOCAL DEFAULT 2 hello

9: 50010011 0 NOTYPE LOCAL DEFAULT 2 bh

10: 50010011 0 NOTYPE LOCAL DEFAULT 2 $d

11: 50010012 0 NOTYPE LOCAL DEFAULT 2 ADD

12: 50008000 0 NOTYPE LOCAL DEFAULT 1 $a

13: 50008004 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end

14: 50010016 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__

15: 50010016 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__

16: 50008004 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start

17: 50010016 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__

18: 50008000 0 NOTYPE GLOBAL DEFAULT 1 _start

19: 50010016 0 NOTYPE GLOBAL DEFAULT ABS __bss_start

20: 50010018 0 NOTYPE GLOBAL DEFAULT ABS __end__

21: 50010016 0 NOTYPE GLOBAL DEFAULT ABS _edata

22: 50010018 0 NOTYPE GLOBAL DEFAULT ABS _end

23: 50010004 0 NOTYPE GLOBAL DEFAULT 2 __data_start


No version information found in this file.

Attribute Section: aeabi

File Attributes

Tag_CPU_arch: v4

Tag_ARM_ISA_use: Yes


(3) equ pseudo-instruction


equ pseudo-instruction introduction:

--Pseudo-instruction function: This instruction is used to define constants;

-- Code example:


.text
.global _start
_start:

@Define a macro variable
.equ DA, 0x68

@Assign the DA value to the r0 register
mov r0, #DA


(4) align directive

Introduction to align directive:

--Pseudo instruction function: indicate data alignment;


Alignment code example:

-- Contains alignment code:


.data @define data variables
hello: @ indicates the variable address, string variable
.ascii "Hello World!"
bh: @ indicates the variable address, byte variable
.byte 0x1
ADD: @ indicates the variable address, word variable
.word 0xff

.text
.global _start
_start:

@Define a macro variable
.equ DA, 0x68

@Assign the DA value to the r0 register
mov r0, #DA


-- Code without alignment:


.data @define data variables
hello: @ indicates the variable address, string variable
.ascii "Hello World!"
.align 4
bh: @ indicates the variable address, byte variable
.byte 0x1
ADD: @ indicates the variable address, word variable
.word 0xff

.text
.global _start
_start:

@Define a macro variable
.equ DA, 0x68

@Assign the DA value to the r0 register
mov r0, #DA


Comparison of code elf content: Most of it is omitted here, only the corresponding memory address is given to check the alignment content;

-- Unaligned code: 0x50010011 is obviously not divisible by 4;


-- Alignment code: 0x50010020 is divisible by 4, so alignment has been performed;


3. Operational pseudo instructions

(1) ldr pseudo-instruction

Machine code shifter_operand segment analysis:

-- Segment analysis: 4 bits store the displacement value, and 8 bits store the value, so the immediate value cannot exceed 8 bits, and the maximum value is 0xFF;

-- Disadvantage: Cannot use large numbers;

-- Example:


.text
.global _start
_start:

mov r0, #0xFFF

-- Compile Error:



octopus@octopus:~/arm/demo$ make
arm-linux-gcc -g -o start.o -c start.S
start.S: Assembler messages:
start.S:5: Error: invalid constant (fff) after fixup
make: *** [start.o] Error 1


ldr pseudo-instruction:

-- Function: can assign large immediate values ​​to registers;

-- Syntax format: "ldr r0, =0xFFF", note that # is not used, use = followed by an immediate value;

-- Code example: This code can be compiled successfully, and 0xfff is assigned to the r0 register;


.text
.global _start
_start:

ldr r0, =0xFFF

-- Disassemble elf code:


octopus@octopus:~/arm/demo$ arm-linux-objdump -S -D start.elf


start.elf: file format elf32-littlearm


Disassembly of section .text:


50008000 <_start>:

.text

.global _start

_start:


ldr r0, =0xFFF

50008000: e51f0004 ldr r0, [pc, #-4] ; 50008004 <_start+0x4>

50008004: 00000fff .word 0x00000fff

Disassembly of section .debug_aranges:


... ...


-- Analyze the disassembly code: "50008000: e51f0004 ldr r0, [pc, #-4] ; 50008004 <_start+0x4>" The code indicates that ldr r0, =0xFFF is the instruction to read memory using ldr, and read the value stored at the address from the pc - 4 address, "50008004: 00000fff .word 0x00000fff" indicates that the system defines 0xFFF in the pc -4 memory address;


(2) nop pseudo-instruction

nop directive:

-- Function: Delay. In some programs with high timing requirements, this instruction is used to delay one clock.

-- Code example:


.text
.global _start
_start:

nop

-- Disassembly: The nop pseudo-instruction performs the meaningless operation "mov r0, r0";


octopus@octopus:~/arm/demo$ arm-linux-objdump -S -D start.elf 

start.elf: file format elf32-littlearm

Disassembly of section .text:

50008000 <_start>:
.text
.global _start
_start:

nop
50008000: e1a00000 nop (mov r0,r0)
Disassembly of section .debug_aranges:

... ...


3. Coprocessor access instructions

1. Introduction to Coprocessor


Coprocessor Introduction:

-- Function: Perform specific processing tasks to reduce the burden on the processor;

-- Mathematical coprocessor: mainly performs digital processing;

-- Coprocessor support: ARM chips support up to 16 coprocessors, the most important coprocessor is CP15;


CP15 coprocessor function: CP15 is the system control register, through which cache, MMU, protection system, clock mode and other system parameters are configured and controlled;

-- How to access CP15: Control the above parameters by accessing the registers in CP15. CP15 provides 16 groups of registers;

-- document :

2. Coprocessor access instructions

mcr instruction analysis: For details, see ARM11 documentation, P145, 3.2;

-- Function: Assign the data in the local register to the register of CP15;

-- Syntax format: "MCR{cond} P15,,,,,";

-- Syntax analysis: CRn indicates which group the CP15 register belongs to, and CRm is also the group name;

-- Code example:


.text
.global _start
_start:

@"MCR{cond} P15,,,,,"
@Read MainID register
mcr p15, 0, r0, c0, c0, 0


-- Document screenshots:


-- CP15 register access: if reading the MainID register, take the previous CRn Op1 CRm Op2 and other parameters;


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Keywords:ARM Reference address:【Embedded Development】 ARM Assembly (Instruction Classification | Pseudo-instructions | Coprocessor Access Instructions)

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