Learn ARM development(17)

Because all embedded systems use interrupts, how does my S3C44B0 interrupt process? Then I need to understand the whole process. To understand it in depth, the best way is to write a program and then debug it continuously. Before this program, you must first have a deep understanding of ARM's interrupt mode and know that it has 7 working modes. Let's first look at how the initialization code initializes the stack in different modes.

/*  IRQMODE。  */
orr     r1,r0,#0x12|0xc0
msr     cpsr,r1
ldr     sp,=IRQ_MODE_SP_START

This code initializes the stack for IRQ mode so that the stack can be used when an IRQ interrupt occurs.

The interrupt process of S3C44B0 is as follows:
when an interrupt occurs, it will jump to the address 0x18 in FLASH to fetch an instruction and execute it. Because only one instruction is allowed there, only a jump instruction can be placed. For example: ldr pc,=0x0c000018, this instruction jumps to SDRAM to run, which means fetching an instruction from 0x0c000018 to run. In fact, I always put a jump instruction at that address, so that it goes to the corresponding interrupt handler. For example, there is a:

b irq, this instruction jumps to the IRQ interrupt handler, and its function is to further search for different interrupt handlers according to different interrupt sources. Its code is as follows:

/*
Use IRQ interrupt to find the entry function address of each interrupt and jump to the corresponding entry function to run.
*/

irq:sub sp,sp,#4 /* reserve a stack for PC */
stmfd sp!,{r8-r9}

ldr r9,=I_ISPR /* read interrupt source register */
ldr r9,[r9]

cmp r9, #0x0 /* ​​If no interrupt source occurs, exit. */
beq IDLE_IRQ

mov r8,#0x0 /* ​​Calculate the interrupt program location corresponding to the interrupt source */
LOOP_IRQ:
movs r9,r9,lsr #1
bcs HAVE_IRQ
add r8,r8,#4 /* Each interrupt entry occupies 4 bytes*/
b LOOP_IRQ

HAVE_IRQ:
ldr r9,=CONFIG_SDRAM_START+4*8 /* From HandleADC interrupt entry */
add r9,r9,r8
ldr r9,[r9]
str r9,[sp,#8] /* Save to the previously reserved SP location*/

ldmfd sp!,{r8-r9,pc} /* Jump to interrupt program execution. */

IDLE_IRQ: /* No interrupt processing. */
ldmfd sp!,{r8-r9}
add sp,sp,#4
subs pc,lr,#4

The function of this code is to first take out the interrupt source flag from the interrupt source storage register I_ISPR of S3C44B0, and then continuously shift to determine whether there is an interrupt at this bit, and if there is an interrupt, handle it. According to the shift, the interrupt entry address is calculated, and in this way, the interrupt entry function can be changed dynamically. CONFIG_SDRAM_START+4*8, this is the interrupt entry function base address, if there is an interrupt at the first bit, it is an ADC interrupt.

Then just jump to this address and run it.

For example, if I use the TICK interrupt of S3C44B0, which is the time slice interrupt, I will set the entry function at the corresponding address and use the following code: ///
... //Input parameters: //Output parameters: // Return value: // Developer: Cai Junsheng // Time: 2006/02/13 //Modification notes : // /// ...

The above statement sets an interrupt entry function as a time slice function. When there is a TICK interrupt, it will run in the time slice function.
In summary, writing an interrupt handler for S3C44B0 requires the following work:

1. Place a jump instruction at 0x18 in FLASH to jump to SDRAM.
2. Place a jump instruction at 0x0c000018 in SDRAM to jump to the IRQ subroutine.
3. Write an IRQ handler.
4. Write a function to handle the actual interrupt source.
5. Set the interrupt register and clear the interrupt source mask bit.