Design of a 0.1-1.2GHz CMOS RF transceiver switch chip

A fully integrated ultra-wideband CMOS RF transceiver switch chip with low insertion loss and high isolation is designed. The circuit adopts deep N-well suspension technology. Under the power supply of 1.8V, the test results of the RF switch transceiver in the range of 0.1-1.2GHz have an insertion loss of 0.7dB, a return loss better than -20dB, and an isolation below -37dB.

At present, the global wireless communication system is in a rapid development process, and the wireless communication "industry-specific network" system is also in a golden period of rapid development. There are many types of frequencies and bandwidths used in my country's wireless communication industry-specific networks, and their frequencies are mainly concentrated in 0.1-1.2GHz. Each private network uses different frequencies, RF bandwidths and signal bandwidths, and the standards are not unified, resulting in different RF chips used in industry-specific network equipment. At the same time, the demand for each narrowband RF front-end chip is difficult to form a scale effect, and the cost is high and matching is difficult. At present, most of the narrowband RF front-end chips used in industry-specific networks are monopolized by foreign companies. Therefore, our country urgently needs a set of wireless broadband RF transceiver chips for the 0.1-1.2GHz industry-specific network frequency band to meet the basic needs of the new generation of broadband wireless mobile communication networks.

RF wireless transceiver chips have been widely used in multiple narrowband or broadband wireless transceiver systems such as mobile phones, radars, wireless local area networks (WLANs) and broadcasting. From the frequency domain, ultra-wideband is significantly different from traditional narrowband and broadband. The relative bandwidth of ultra-wideband (the ratio of signal bandwidth to center frequency) is usually above 25%. Therefore, 0.1-1.2GHz wireless broadband RF transceiver chips belong to ultra-wideband circuits. At present, under CMOS technology, there are no mature commercial ultra-wideband RF transceiver chip solutions in China and abroad that can meet the design requirements of this frequency band.

The wireless ultra-wideband RF transceiver chip consists of multiple circuit modules such as RF transceiver switch (T/R Switch), low noise amplifier (LNA), mixer (Mixer), power amplifier (PA), filter, etc. As the front-end circuit of the wireless broadband transceiver chip, the RF transceiver switch (T/R switch) is mainly used to control the switching of the receiving and transmitting states of the entire transceiver chip (as shown in Figure 1). It connects the transceiver antenna, low noise amplifier and power amplifier, and is a key module in the transceiver chip. There are many manufacturing processes for traditional RF transceiver switches. Most of the common products on the market currently use III-V process or discrete devices such as PIN diodes. The advantages of this type of switch are low power consumption and good isolation. However, their disadvantages are high cost, high power consumption, and large occupied area. With the continuous development of process technology, CMOS technology has outstanding advantages such as high integration, low cost and low power consumption, making it an inevitable trend to use CMOS process to realize RF transceiver switches.

Figure 1 Schematic diagram of the working principle of the RF transceiver switch

Insertion loss, isolation and linearity are three key indicators for measuring the characteristics of RF transceiver switches. In addition, return loss is also a major indicator. Traditional symmetrical RF transceiver switches are generally designed with four ordinary NMOS tubes in series and parallel. The advantage of this structure is that the isolation is better, but it will deteriorate the insertion loss and linearity to a certain extent. Its typical simulated insertion loss is about 1dB. In 2008, based on the basic NMOS tube series structure, a broadband RF transceiver switch was realized using an improved body-floating technology using NMOS devices with deep N-well technology. Compared with the traditional series-parallel structure switch circuit, this structure has the advantages of higher linearity and lower insertion loss.

The RF transceiver switch designed in this paper is based on the typical series-parallel structure circuit, combined with the substrate suspension technology described in the reference, to achieve a good compromise of various indicators. The switch circuit in this paper not only has a high isolation characteristic, but also has a significant improvement in linearity. The test results show that the RF switch achieves an isolation of less than -37dB and an insertion loss of 0.7dB in the 0.1-1.2GHz frequency band, and has a 1dB compression point higher than 22dBm in the typical application frequency bands of RFID 433MHz and GSM-R 900MHz.

1. Solution Design

Figure 2(a) shows a cross-sectional view of an NMOS device in a deep N-well process using body suspension technology. Usually, the deterioration of switching linearity is caused by the parasitic diode that is turned on instantaneously when the device is in operation. Due to the presence of the deep N-well, two additional parasitic diodes are generated in the device, namely the P-well/deep N-well diode and the deep N-well/P-type substrate diode. Therefore, when the P-well is connected to the ground by a large resistor and the deep N-well is connected to a high potential (as shown in Figure 2(b)), all diodes will not be forward-conducted and latch-up effect will not occur, thereby improving the linearity of the entire circuit. In the circuit design of this article, the deep N-well uses a 1.8V voltage bias.

Figure 2 (a) Cross-sectional view of a deep N-well NMOS transistor

(b) NMOS tube resistor connection diagram

Figure 3. Schematic diagram of broadband RF transceiver switch design

Figure 3 shows the circuit schematic of the broadband RF transceiver switch design. Based on the typical series-parallel structure, the circuit uses NMOS devices with deep N-well process of body suspension technology. As can be seen from the figure, transistors M2 and M4 are connected in series, with the antenna end in the middle, and M1 and M3 are connected in parallel at the receiving end RX and the transmitting end TX. The circuit is completely symmetrical in both transmission and reception, and all devices use deep N-well 1.8V thin-oxide RFNMOS tubes.

In the whole circuit, transistors M2 and M4 act as switches to select the transmit and receive state of the circuit. When VDD is 1.8V and VSS is -1.8V, transistors M2 and M3 are turned on, M1 and M4 are turned off, and the switch is in the receive mode. At this time, the RF signal flows from the antenna to the RX end. Due to the existence of the source-drain capacitor Cds, part of the signal will be coupled from M4 to the Tx end of the circuit. At this time, M3 is in the on state, and the signal coupled from M4 can be conducted to the ground, thereby improving the isolation of the switch. When VDD is -1.8V and VSS is 1.8V, the switch is in the transmit mode, which is basically the same as the receive mode. Resistors R1, R5, R7 and R12 are connected to the deep N well of the NMOS tube to bias the deep N well; gate resistors R3, R6, R9 and R11 are used to improve isolation; R2, R4, R8 and R10 are connected to the body end of the transistor for body end suspension. Furthermore, in order to further improve the isolation, the resistance values ​​of all body suspension resistors should be large enough.

In this broadband RF transceiver switch circuit, the size of transistors M1 and M3 is 96μm/0.18μm, the size of M2 and M4 is 200μm/0.18μm, and the size of resistors R1~R12 is 9K ohm. This circuit uses Cadence SpectreRF to perform circuit design and simulation optimization on the switch circuit.

2 Test Results

This switch circuit design uses GLOBALFOUNDRIES 0.18μm CMOS process. The core area of ​​the switch circuit is 0.015mm2, and the overall area including the chip test pad is 0.53mm2. Figure 4 is a micrograph of the RF transceiver switch chip. The on-chip test environment of this chip is based on the Cascade Summit probe platform, as shown in Figure 5. Rohde & Schwarz's vector network analyzer ZVA40 is used, and the TOSM (through-open-short-match) method is used for instrument calibration. During the test, the deep N-well bias voltage VCC is always 1.8V, and the control voltages VDD and VSS are 1.8V or -1.8V. The input and output are tested on-chip using GSG RF probes.

Figure 4 Photo of the RF transceiver switch chip (receiving state)

Figure 5 Photo of the RF transceiver switch test platform

Figure 6 Insertion/return loss test results in receive mode

Figure 7 Isolation test results in receiving mode

Figures 6 and 7 are the S parameter test results of the RF switch in the receiving state. As can be seen from Figure 6, within the 0.1-1.2GHz frequency band, the insertion loss (S21) of the switch is about -0.7dB, and the flatness is good, and the input and output return losses (S11 and S22) are less than -20dB; as can be seen from Figure 7, the isolation (S13) of the RF switch is greater than 37dB in the entire frequency band, and has good isolation characteristics. Due to the fully symmetrical structure, the S parameter test results of the RF switch in the transmitting state are basically the same as those in the receiving state. Figure 8 shows the output power curve and 1dB compression point of the transceiver switch at 433MHz and 900MHz. The test results show that the 1dB compression points of the output power curves of the two frequencies are 23.1dBm and 22.7dBm, respectively, and the power compression characteristics are basically the same.

Figure 8 Output 1dB compression point test results

Conclusion

This paper designs a high-performance ultra-wideband fully integrated CMOS RF transceiver switch chip with a total chip area of ​​0.53mm2. Test results show that under 1.8V power supply conditions, the RF switch can achieve an insertion loss of about 0.7dB for both the transceiver and transmitter in the 0.1-1.2GHz frequency band, a return loss of less than -20dB, and an isolation better than 37dB. In addition, the linearity of 23.1dBm and 22.7dBm can be achieved at 433MHz and 900MHz respectively. The circuit meets the basic design requirements of wireless broadband RF transceiver chips in the 0.1-1.2GHz frequency band, and is suitable for typical applications in RFID and GSM-R systems.