Chen Chunzhang: Intel Architecture Day reveals that innovation cannot be achieved overnight

Digitalization has become the driving force behind the transformation of the old and new worlds, which has also brought unprecedented challenges to the entire technology industry. "The arduous computing challenges we face must be solved through revolutionary architecture and platform innovation." Intel CEO Pat Gelsinger said at the Architecture Day press conference that Intel has developed many architectures and platforms, including microarchitectures for performance and energy efficiency. From edge and terminal devices to networks and clouds, everything is designed to intelligently use the best computing resources, that is, to use the best architecture to complete each task.

In this regard, Dr. Chen Chunzhang, a researcher at Pengcheng Laboratory and part-time professor at University of Chinese Academy of Sciences and Zhejiang University, believes that Intel's architectural innovation is mainly aimed at three application directions: traditional desktop computers, data centers, and deep learning, which are all areas with the highest requirements for digital technology.

Dr. Chunzhang Chen, researcher at Pengcheng Laboratory, adjunct professor at University of Chinese Academy of Sciences and Zhejiang University

"These innovations involve the design of ultra-large-scale processor SoCs. This type of digital chip is not afraid of small but big. In order to increase computing power and improve the speed and accuracy of data processing, it needs to continuously integrate more functions and expand its scale," said Chen Chunzhang.

The increase in chip size also means newer requirements for processes. Not long ago, Intel announced a new CPU process roadmap. In addition to renaming the original process nodes, it also proposed Intel's latest 20Å (angstrom) node process. 10Å is equal to 1 nanometer, and angstroms are used as units. Whether it is manufacturing or measurement, it represents a higher level of precision in technology requirements.

Digital chips represented by processors have undergone tremendous changes in recent years, which was also reflected in Intel's press conference. Chen Chunzhang attributed it to three points: first, the innovation of computing architecture, which is also the theme of this Architecture Day event; second, the progress in the back-end of chip design. Intel has done a lot of sophisticated work in the back-end design closely related to advanced processes, especially using advanced packaging technology. For example, the Ponte Vecchio released this time, which contains 100 billion transistors, uses EMIB technology and Foveros 3D packaging technology; third, the coordinated optimization of the front-end and back-end.

Chen Chunzhang pointed out that this kind of change happens every few years, from adhering to Moore's Law and the Tick-Tock model to the proposal of the new concept of "process-architecture-optimization". However, if it is to be truly realized, each step is inseparable from the years of accumulation of many engineers behind the scenes.

Intel introduced two new x86 core architectures at Architecture Day, the Energy Efficiency Core (E-Core) and the Performance Core (P-Core), achieving a new breakthrough. Intel also created the first performance hybrid Alder Lake architecture based on E-Core and P-Core, using a hardware thread scheduler.

The performance core is Intel's highest-performing CPU core to date, equipped with built-in AI acceleration technology, making it faster, wider, smarter, and deeper. It is designed for maximum performance and general-purpose computing, and breaks through the low latency limit in single-threaded applications. The energy-efficiency core is designed for large-scale processing, aiming to push the performance of multiple cores per watt to the limit.

Chen Chunzhang believes that this is a great innovation. Intel can combine the two new cores, performance cores and energy consumption cores, in different numbers according to the application requirements of desktops and data centers.

At the same time, to cope with the complexity of diverse data centers, Intel launched Mount Evans, its first ASIC-based IPU design, and Oak Springs Canyon, a new FPGA-based IPU reference platform, designed a new independent GPU for game enthusiasts, and brought Ponte Vecchio to exascale computing.

Chen Chunzhang believes: "If you look at GPUs and IPUs together, their purpose is to perform data calculation and processing, including image data processing, which is closely related to the large amount of data demand brought about by the Internet of Things and machine learning in recent years."

He said that Intel considered the entire industry chain, integrating everything from system architecture to packaging, testing and applications, and thus announced the IDM 2.0 strategy in March this year.

Ten minutes on stage is the result of ten years of hard work. Chen Chunzhang saw the years of accumulation that Intel has made for these innovations. "The experience accumulated by a large and established company over decades is very rich and valuable. The many innovations on Intel Architecture Day were not achieved overnight, but were the result of years of continuous accumulation and updating of technology every year."

He believes that this brings a very important revelation to domestic companies, that is, basic research requires long-term accumulation, requires many R&D personnel to invest many years of hard work, and constantly improve and perfect various skills. It is necessary to shift from "homogeneous competition" to multi-faceted and all-round technology advancement in order to develop high-quality and high-level chips.