The PCIe 7.0 specification is designed to support emerging applications such as 800 G Ethernet, AI/ML, cloud and quantum computing; and data-intensive markets such as hyperscale data centers, high-performance computing (HPC) and military/aerospace.
After completing the specification of PCIe 6.0, PCI-SIG announced the new plan for PCI Express 7.0 on Tuesday. If all goes well, the new specification will be officially launched in 2025. Although PCIe 5.0 is still in the popularization stage, PCIe 7.0 in the future can support 128 GT/s @ x16 interface configuration and up to 512 GB/s bidirectional transmission.
The following are the key features of the PCIe 7.0 specification:
● Provides 128 GT/s and 512 GB/s bidirectional transfers in a x16 configuration.
● Using PAM4 pulse amplitude modulation signaling
● Pay attention to channel parameters and ranges
● Further reduce latency and improve reliability
● Improve energy efficiency
● Compatible with all previous PCIe versions
"PCI-SIG clocks have been built this way for 30 years," said Nathan Brookwood, a researcher at Insight 64.
Early parallel versions of PCI technology had transfer rates of only a few hundred MB/s, which matched the graphics, storage, and networking needs of the 1990s.
In 2003, the PCI-SIG pushed for a transition to serial designs supporting thousands of MB/s (several GB/s) to accommodate higher-speed solid-state disks and Ethernet connections.
After tightening its spring, PCI-SIG doubles the bandwidth of the PCIe specification almost every three years to actively respond to the challenges of emerging applications and markets.
Today's newly announced PCIe 7.0 doubles the channel speed to a bidirectional 512 GB/s, continuing the goal of doubling the performance of the PCIe specification within another three-year cycle.
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