Silicon chip fusion technology helps SoC FPGA design architecture stand out (Part 2)

　　Field-programmable gate arrays (FPGAs) are a third option for system designers (Figure 1). In many ways, FPGAs have been a middle ground between the software-centric approach of CPU architecture and the hardware-centric approach of ASICs. Algorithms implemented in FPGAs are not as easy to modify as software, but it is much easier to modify an FPGA configuration than to put a new version of an ASIC into production, even if the modification is only on a few metal layers.

　　Figure 1 Field Programmable Gate Array Development Blueprint

　　Conversely, running a task in an FPGA is much faster and uses less power than running the same task in software, but FPGAs are generally slower and less functionally efficient than comparably priced ASICs.

　　Therefore, when a software-only solution cannot meet the speed and power consumption requirements, when an ASSP that can distinguish the product cannot be found, or when using ASICs does not meet the budget requirements, cannot achieve the expected production volume, and cannot support future system changes, system designers will turn to FPGAs. For FPGA suppliers, this situation often occurs, and in recent years, FPGA sales have been much better than its alternatives.

　　In the surveillance example, designers can combine an industry-standard microprocessor running the system software with an FPGA implementing commercial silicon intellectual property (IP) for standard image processing and a custom-designed DSP pipeline. In this way, the design in the FPGA is similar to an ASIC at the functional block level, but the implementation at the gate level is completely different.

　　Choose the best implementation method for the task

　　Ideally, system developers would not have to choose between multiple approaches. Developers could choose the best implementation for each task. Tasks that rarely change and are not critical can be implemented in the corresponding CPU software. Tasks that are very critical for performance and power consumption are defined by standards so that they do not change and become fixed hardware. Tasks that are likely to change and require hardware support are implemented within the FPGA programmable logic fabric.

　　This was actually a common approach in the past few silicon chip process generations. At that time, the integration was low, and the microprocessor, accelerator, complex interface controller, and FPGA were all independent chips. But in the 90 nanometer (nm) process generation, in addition to the FPGA architecture, the system-on-chip (SoC) includes all these functions, and most of the implementation methods are determined by the SoC designer rather than the system designer. The system designer selects the most suitable SoC, writes his own software, and implements the flexible interface between the FPGA and the SoC, thereby highlighting the product advantages.

　　Now, the situation has changed again. Chip developers can use a large number of transistors to support the silicon fusion of FPGAs. Powerful microcontrollers add dedicated hardware, so they look like ASIC SoCs. ASICs and ASSPs can contain powerful 32-bit CPUs, so they look like high-end microcontrollers. The new SoC FPGA series contains both multi-core CPUs and dedicated hardware modules to meet actual needs, allowing system designers to choose software, dedicated hardware or programmable logic according to different task requirements.

　　Designers can use this type of fusion chip to implement the multi-threaded portion of the system software and image processing algorithms on a pair of powerful CPU cores. They can implement other algorithms on the DSP hard core and programmable architecture, all on a single chip.

　　Rising development costs have reduced the number of ASIC applications, and the silicon convergence trend supports the realization of three system-level solutions. Microcontrollers, ASSPs, and FPGAs are almost the same, but with one important difference. For technical and intellectual property legal considerations, only FPGAs can implement the most advanced programmable logic architecture. Therefore, only FPGAs support system designers to implement their strategies to highlight product advantages at the hardware level.
Silicon convergence brings various possibilities

　　Silicon chip convergence will set the direction for system development in the next few years. On the one hand, we will see high-end microcontrollers and ASSPs become the hardware foundation of the system. These system hardware will be commercialized, and the difference between system products in the market will be reflected in the software. On the other hand, we will also see systems that highlight hardware advantages and adopt FPGA architecture stand out.

　　This trend will be further accelerated by two emerging technologies: three-dimensional (3D) ICs and heterogeneous programming systems. 3D IC technology supports IC integration of disparate technologies, such as FPGAs, microprocessors, dynamic random access memory (DRAM), and radio frequency (RF), in a single stack without the inter-chip timing and power cost issues of separate ICs. An early example of this trend is the Intel Atom E6x5C series, which integrates an Atom CPU and an Altera FPGA. Atom provides an industry-standard architecture for software, while the FPGA enables the creation of specialized accelerators and interface controllers.

　　The E6x5C family also meets the needs of another emerging technology - heterogeneous structure programming environment. Ideally, system developers only need to write and debug the software of one CPU to start the design. Then, the development platform will help them find the key code fragments, distribute tasks on multiple CPU cores, share cache memory, and build hardware accelerators for key code cores. Through this approach, the design team can fine-tune the design until it meets the timing and power consumption requirements.

　　An example of such a development environment is Altera's ongoing OpenCL-FPGA project (Figure 2). Its goal is to provide a single environment in which system developers can develop programs in C, isolate cores that require a lot of computation, generate parallel hardware engines to accelerate the cores, and integrate the final hardware and software system.

　　Figure 2 OpenCL-FPGA Project
Driven by the need to increase silicon chip integration, fusion functions are gradually integrating all major electronic modules of the system into one package, allowing system developers to focus on highlighting the advantages of their final products. FPGAs appear to be more and more like ASSPs and microcontrollers, but in fact they enhance the ability of system developers to highlight hardware advantages. The emerging 3D IC technology and heterogeneous structure development environment will accelerate the emergence of FPGA system-level ICs from the traditional microelectronics world.

　　Figure 3 Silicon chip fusion will create more application possibilities for FPGA.