China uses 22nm to build 256-core chips, targeting 1600 cores

According to news on January 5, the Institute of Computing Technology of the Chinese Academy of Sciences has built large-scale chips with up to 256 cores, and the future goal is to reach up to 1,600 cores. For this purpose, the entire wafer will be used, that is, "wafer-level chips" ".

This chip is named "Zhejiang" and adopts the chiplet core layout that has been popular in recent years. It is divided into 16 cores. Each core has 16 RISC-V architecture cores, totaling 256 cores, all of which support programmability. , reconfigurable.

Different cores are interconnected through Network Chip (Netwokr-on-Chip) and Synchronous Multiprocessor (SMP), while different cores are interconnected through D2D (Die-to-Die) interface and Inter-chiplet. Network) interconnection, and then jointly connect the memory, and use 2.5D interposer packaging.

In the future, this design can be expanded to 100 cores, thus reaching 1,600 cores.

Incredibly, the manufacturing process is still 22nm, presumably from SMIC, but because the latency is very low, the overall performance is good and the power consumption is not high.

I just don’t know if 1600 cores can be achieved under the 22nm process. Of course, SMIC has already had more advanced processes, so there are no insurmountable obstacles.

It is worth mentioning that as early as 2019, the semiconductor company Cerebras Systems released the world's largest chip "WSE" (Wafer Scale Engine), an AI processor the size of a wafer.

It is manufactured using TSMC's 16nm process and has an area of ​​46,225 square millimeters, 1.2 trillion transistors, 400,000 AI cores, 18GB SRAM cache, 9PB/s memory bandwidth, 100Pb/s interconnect bandwidth, and a power consumption of up to 15 kilowatts.

The price is said to be in the millions of dollars.