Fraunhofer IPMS offers RISC-V IP

Publisher:EEWorld资讯Latest update time:2023-09-01 Source: EEWORLDKeywords:RISC-V Reading articles on mobile phones Scan QR code
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The accessibility of RISC-V is sparking a revolution, allowing developers to design processors that fit specific requirements thanks to its open architecture. Fraunhofer IPMS has extensive RISC-V expertise for research projects and is actively developing related products.


RISC-V was designed to emphasize energy efficiency in addition to the computing power of new designs. This enables small, energy-efficient and high-performance processors. Because the instruction set architecture (ISA) is freely available, companies can design, customize and implement RISC-V processors.


Fraunhofer IPMS also develops processor IP based on the open RISC-V ISA. EMSA5 is a 32-bit processor with a five-stage pipeline, used for functional safety applications in embedded systems and automotive fields. The IP core has passed the ASIL D certification of ISO 26262.


The expertise of the Fraunhofer IPMS development team regarding the RISC-V ecosystem is also used and further developed in research projects.


The overall goal of the BMBF-funded TRISTAN project is to expand and industrialize the European RISC-V ecosystem. To this end, the ecosystem will be expanded with industrial-quality basic components that can be used in SoC designs in various application areas (e.g. automotive, industrial, etc.). The approach includes electronic design automation (EDA) tools and the entire software stack. This would provide an independent and open alternative to commercial (mainly non-European) solutions and strengthen Europe’s technological sovereignty.


In this project, Fraunhofer IPMS will develop an open source trace module for embedded RISC-V processors according to appropriate specifications together with other partners. The trace IP will be integrated into the demonstrator along with the RISC-V processor EMSA5 and TSN-enabled Ethernet endpoint IP to demonstrate fault-free tracing when user applications on the processor simultaneously use the interface.


As part of the OCTOPUS funding program, the joint project ImaB-Edge is developing an electronic system of distributed sensors for permanently monitoring the condition of infrastructure building structures to ensure energy savings and predictive maintenance. As a result, the project helps ensure the safety of the infrastructure and saves maintenance costs.


The main task of Fraunhofer IPMS is to design an energy-efficient, flexible, scalable and high-performance computing cluster composed of multiple RISC-V processors. The EDGE gateway acts as an always-on sensor edge module, performs self-sufficient data collection, and serves as a central interface for operators. Using artificial intelligence, aims to provide the latest prior knowledge. The findings are also combined with historical data. In addition, the EDGE gateway will enable the integration of expert knowledge into sensor systems.

Keywords:RISC-V Reference address:Fraunhofer IPMS offers RISC-V IP

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