TSMC reiterates that 2nm process will be mass-produced in 2025, with power consumption reduced by 30%

At today's Q2 earnings conference, TSMC not only announced the operating data for the quarter, but also talked about the process progress, confirming that the 3nm process will be mass-produced in the second half of this year, and the 2nm will be mass-produced in 2025. Currently, HPC high-performance computing accounts for an important part of TSMC's revenue, and the requirements for advanced processes are also very high. TSMC's 3nm process will be mass-produced in the second half of this year and contribute to revenue in the first half of next year, but it will initially lower the gross profit margin by about 2-3 percentage points.

TSMC's 3nm process has five derivative versions, including N3, N3P, N3S, N3X, N3E, etc., which will be mass-produced in the next two to three years.

Next is the 2nm node, which is a major node for TSMC. It will use nanosheet transistors to replace FinFET (fin field effect transistor), which means entering the GAA transistor era. However, Samsung has already adopted this technology at the 3nm node.

Compared with N3, N2 is 10~15% faster at the same power consumption; at the same speed, power consumption is reduced by 25~30%, opening a new era of high performance.

However, the density has been very limited, with only a 10% improvement compared to 3nm, far from meeting the requirement of doubling the density under Moore's Law, and is also far behind TSMC's previous new process's density improvement of at least 70%.

According to TSMC, the 2nm process will start trial production in 2024 and mass production in 2025.