[Shishuo Design] The "ideal type" of high-side current detection is like this~
Latest update time：2020-06-29
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Precision microampere-level high-side current measurement requires a small value sense resistor and a low offset voltage amplifier. The LTC2063 zero-drift amplifier has a maximum input offset voltage of only 5 µV and consumes only 1.4 µA, making it an ideal choice for building a complete ultra-low power precision high-side current sensing circuit (see Figure 1).
Figure 1. Precision high-side current sensing circuit based on the LTC2063 zero-drift amplifier.
The circuit requires only 2.3 µA to 280 µA of supply current to sense a wide dynamic range of 100 µA to 250 mA. The very low offset voltage of the LTC2063 enables the circuit to operate with shunt resistors as low as 100 mΩ, resulting in a maximum shunt voltage limit of only 25 mV. This can significantly reduce the power loss on the shunt resistor and greatly increase the power available to the load. The rail-to-rail input of the LTC2063 allows the circuit to operate with very small load currents, with its input common mode almost exactly on the supply rails. The LTC2063's integrated EMI filter protects the device from RF interference in high noise conditions.
For a given sense current, the voltage output of this circuit is:
Zero
A key specification for current sensing solutions is the zero point, or the output-referred input error current produced when no sense current is present. The zero point is typically determined by the amplifier’s input offset voltage divided by R
SENSE
. The LTC2063’s low input offset voltage of 1 µV typical and 5 µV maximum, and low input bias and offset currents of 1 pA to 3 pA typical, result in an input-referred zero error current of only 10 µA typical (1 µV/0.1 Ω) and 50 µA maximum (5 µV/0.1 Ω). This low error allows the sensing circuit to maintain its linearity down to the minimum current in its specified range (100 µA), without the linearity flattening out due to a fixed offset value at low ranges due to loss of resolution (as shown in Figure 2 ). The resulting input current vs. output voltage curve is linear over the entire current sensing range.
Figure 2. With no fixed offset value on the low side, I
SENSE
can be as low as 100 µA.
Another source of zero-point error is the output PMOS drain current at zero gate voltage, or IDSS, which is
the parasitic current present at a non-zero V
DS
when the PMOS is nominally off (|V
GS
| = 0)
. A MOSFET with high
IDSS
leakage current
will produce a non-zero positive V
OUT
value
in the absence of I
SENSE
.
The transistor used in this design is the Infineon BSP322P, which
has an upper limit of 1 µA for
I
DSS
at |V
DS
| = 100 V.
A reasonable estimate of the typical I
DSS
of the BSP322P in this application is that
at room temperature and V
DS
= –7.6 V, II
DSS
is only 0.2 nA, resulting in only a 1 µV error output, or equivalently a 100 nA input current error when measuring 0 A input current.
Architecture
The LT1389-4.096 reference and the bootstrap circuit consisting of M2, R2, and D1 form an ultralow power isolated 3 V rail (4.096 V + M2’s V
TH
, which is typically -1 V) that prevents the LTC2063 from reaching its absolute maximum supply voltage of 5.5 V. Although series resistors could also suffice to establish the bias current, the use of transistor M2 allows for a higher overall supply voltage while limiting current consumption at the high end of the supply range to only 280 µA.
Precision
The input offset voltage of the LTC2063 results in a fixed input-referred current error of 10 µA (typical). At a 250 mA full-scale input, the resulting offset error is only 0.004%. At the low end, 10 µA out of 100 µA represents a 10% error. Since the offset is constant, it can be calibrated out. Figure 3 shows that the total offset created by the LTC2063, the unmatched parasitic thermocouple, and any parasitic series input resistance is only 2 µV.
Figure 3. V
IN
to V
OUT
conversion over the entire
ISENSE
range
with a minimum supply of 4.5 V.
The 200.7 μV output offset divided by the 100.05 V/V voltage gain represents a 2 μV RTI input bias.
The gain shown in Figure 3 is 100.05 V/V, which is 1.28 V/V greater than the expected gain given by the actual values of R
OUT
and R
IN
as constructed, which is 4.978 kΩ/50.4 Ω = 98.77 V/V. This error is likely
caused by the parasitic series resistance of about 500 mΩ between
the input of the LTC2063 and R
SENSE
.
The main source of uncertainty in the output of this circuit is noise, so filtering with large parallel capacitors is critical to reducing the noise bandwidth and thus the total integrated noise. The LTC2063 adds approximately 2 µV pp to the input-referred low frequency noise when using a 1.5 Hz output filter. Averaging the output over as long a duration as possible further reduces errors due to noise.
Other sources of error in this current sense circuit include
parasitic board resistance in series
with R
SENSE
at the LTC2063 input, tolerances in the resistance values of the gain setting resistors R
IN
and R
OUT
, mismatched temperature coefficients of the gain setting resistors, and error voltages at the op amp inputs caused by parasitic thermocouples. The first three sources of error can be greatly reduced by using Kelvin connections to sense the R
SENSE
4-pin sense resistors and by using 0.1% resistors with similar or lower temperature coefficients than the critical gain setting paths of R
IN
and R
OUT
. To eliminate parasitic thermocouples at the op amp inputs, R1 should have the same metal terminals as R
IN
. Asymmetric thermal gradients at the inputs should also be avoided whenever possible.
The total contribution of all the error sources discussed in this section is at most 1.4% referenced to a full-scale 2.5 V output (see Figure 4).
Figure 4. The percent error remains below 1.4% over the entire reading range.
Supply Current
The LT1389-4.096 and LTC2063
require a minimum supply current of 2.3 µA at
minimum V
SUPPLY
and I
SENSE
(4.5 V and 100 µA) and up to 280 µA at maximum V
SUPPLY
and I
SENSE
(90 V and 250 mA) (see Figure 5). In addition to the current consumed by the active components, V
SUPPLY
is required to provide an output current, I
DRIVE
, through M1 that is proportional to the output voltage and ranges from 200 nA at 1.0 mV output (at 100 µA ISENSE) to 500 µA at 2.5 V output (
at 250 mA
I
SENSE
). Therefore,
the total supply current ranges from 2.5 µA to 780 µA, excluding
I
SENSE
. R
OUT
is set to 5 kΩ for a reasonable ADC drive value.
Figure 5. Supply current increases with supply voltage but never exceeds 280 μA.
Input voltage range
In this architecture, the maximum supply is determined by the maximum |V
DS
| that the PMOS output can withstand. The BSP322P is rated for 100 V, so 90 V is a suitable operating limit.
Output range
This design can drive a 5 kΩ load, making it suitable as a driver stage for many ADCs. Its output voltage range is 0 V to 2.5 V. Since the LTC2063 has a rail-to-rail output, the maximum gate drive is limited only by the headroom of the LTC2063. In this design, the typical value is 3 V, which is set by the 4.096 V of the LT1389-4.096 plus the typical value of VTH of M2,
–1
V.
Because the output of this circuit is a current, voltage, ground, or lead offsets do not affect accuracy. Therefore, long leads can be used between the output PMOS M1 and R
OUT
, allowing R
SENSE
to be located near the current to be sensed and R
OUT
to be located near the ADC and other subsequent stages of the signal chain. The disadvantage of long leads is increased EMI susceptibility.
The 100 nF C3 across R
OUT
shunts harmful EMI before it reaches the next stage.
Speed Limit
Since the LTC2063 has a gain-bandwidth product of 20 kHz, this circuit is recommended for measuring signals of 20 Hz or less. C2 of 22 µF is placed in parallel with the load to filter the output noise to 1.5 Hz to improve accuracy and protect subsequent circuitry from sudden current surges. The trade-off for this filtering is longer settling time, especially at the lowest end of the input current range.
in conclusion
The LTC2063 features ultralow input offset voltage, low I
OFFSET
and low I
BIAS
, and rail-to-rail inputs, providing precision current measurement over the full 100 µA to 250 mA range. The circuit has a maximum supply current of 2 µA, allowing it to operate at supply currents well below 280 µA over most of its operating range. The LTC2063's low supply current and low supply voltage requirements allow it to be powered from a voltage reference with more than adequate margin.
LTC2063
-
Low Supply Current: 2μA Max (Per Amplifier)
-
Offset voltage: 5μV (max)
-
Offset voltage drift: 0.02μV/°C (max)
-
Input bias current:
-
3 pA (typical)
-
30 pA (max), –40°C to 85°C
-
100 pA (max), –40°C to 125°C
-
Integrated EMI filter (114 dB suppression at 1.8 GHz)
-
Shutdown Current: 170 nA max (per amplifier)
-
Rail-to-rail input and output
-
Operating voltage range: 1.7 V ~ 5.25 V
-
A VOL ：140 dB (typical)
-
Low-power power-up for duty-cycle applications
-
Rated temperature range:
-
–40°C ~ 85°C
-
–40°C ~ 125°C
-
SC70, TSOT-23, MS8 and DFN packages
Original article from
Analog Devices
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