Design of Ultrasonic Liquid Density Sensor Based on FPGA

Publisher:码字奇才Latest update time:2010-01-26 Source: EDN ChinaKeywords:FPGA Reading articles on mobile phones Scan QR code
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0 Introduction

Liquid density is an important parameter in many industries. It can directly participate in the control and decision-making of the production process. Therefore, it is of great significance to quickly and accurately detect liquid density online. Especially in the fields of petroleum, chemical, food, medicine and other industries, the measurement of density is directly related to the national economy and the personal safety of consumers.

1 Working principle of ultrasonic liquid density meter

There are many ways to measure the density of liquids using ultrasound. With the rapid development of electronic technology, the method of measuring density with the help of sound velocity has been widely used. This is because when ultrasound propagates in liquid, its sound velocity and the density of the liquid follow the following relationship:

official (1-1)

Where C is the speed of ultrasonic wave in liquid; ρ is the density of liquid; K is the compression coefficient. For a specific liquid, the compression coefficient K is a constant. As long as the speed of ultrasonic wave in liquid is measured, the density of liquid can be calculated. The speed measurement can be determined by the sound path and propagation time of ultrasonic wave in liquid.

2. Design of control and calculation circuit based on FPGA

Since the frequency of FPGA chips is very high, it is easy to design and implement clock circuits of tens of megahertz or even hundreds of megahertz, so it is very suitable for designing high-speed timing circuits. In this design, Altera's CycloneⅡ series chips are selected. The operating frequency of this series of chips can be as high as 400MHz, which is enough to meet the needs of this design. The software development platform is QuartusⅡ. The overall system block diagram of the circuit (including analog and digital parts) is shown in Figure 1.

System circuit schematic

Figure 1 System circuit schematic

2.1 Square Pulse Generation Module

The function of the square pulse generation module is to generate square pulses of a certain frequency to stimulate the operation of the transmitting probe. The selection range of the square pulse frequency should be 1/10 of the vibration frequency of the probe piezoelectric chip (2MHz in this design), so 200KHz is selected. Its generation is achieved by a square pulse signal generator based on FPGA [1]. Its external pin structure is shown in Figure 4, where the input signals are clk (clock) and en (enable terminal), and the output signal is dout [7…0].

2.2 Design of high-speed counter

高速计数器的设计是实现精确测量时间的核心。本设计中,为了获得精确的计数频率,采用了QuartusⅡ中內嵌的锁相环,外部的参考时钟由16MHz的晶振提供,锁相环所采用的倍频为6倍,这样就能获得稳定的96MHz的内部时钟。整体的原理图结构如图2所示。锁相环(PLL3)的频率输出作为计数器的计数时钟,计数器(cnter)由四个十进制计数器组成,内部设有FIFO,主要用于计数结果的读取,当wrreq(写允许)信号为高电平时,将计数结果写入FIFO,FIFO的时钟与计数器的时钟同步;当接收电路的信号经过光电耦合器到达rdreq(读允许)端时,该端电平变为高电平,同时wrreq为低电平,此时计数结束,同时将计数结果送到输出端,输出计数结果。

High-speed counter schematic diagram

Figure 2 High-speed counter schematic diagram [page]

2.3 Calculation and compensation module

The calculation and compensation module is divided into two parts: calculation and compensation. Its function is to calculate the density of the liquid based on the counting result of the counter and the result of temperature correction by the compensation circuit. In this design, the distance between the transmitting and receiving probes is 2cm; the time for the sound wave to pass between the two probes can be obtained from the counting result of the counter (cntvalue), because the unit counting time is the reciprocal of the counting frequency, so:

official (2-1)

The structure of the operator is shown in Figure 3. Inputs c1 and c2 are count values, and the results after the parallel multiplier operation are sent to the parallel divider; because the compression coefficient K is a constant, but the K of each liquid is different, the entire density meter needs to have the function of selecting the liquid. The sel module in the figure is the part that realizes this function. The input signal is used to select the liquid to be tested. The density meter in this design can measure 300 kinds of liquids, so the selection signal is a 9-bit coded binary number. The essence of the selection module is a memory that stores the compression coefficients of various liquids. The coefficient of the density of the liquid to be tested is found according to the selection signal, and the result is also sent to the divider.

Operation

Figure 3 Operation and compensation module structure

The TEM in the figure is the temperature compensation module. Temperature has a great influence on the speed of sound. In liquid, every 1°C change in temperature will cause a 2% change in the speed of sound. In the actual environment, the temperature generally changes by more than 40°C. The resulting change in the speed of sound of more than 8% may introduce an error of more than 8% to the actual measurement. When using ultrasonic sound velocity to measure liquid density, in order to improve accuracy, temperature compensation must be performed [2].

2.4 Control and operation circuit

The overall structure of the control and operation circuit is shown in Figure 4. Pulse is a square pulse generation module; count is a high-speed counter; operate is an operation and compensation module; ADC is an A/D conversion control module. The working process of the whole system is: when the enable end of the pulse module is high, the module starts to work and generates a square pulse; because the enable end of the counter is shared with the enable end of the pulse, the counter starts counting at the same time as the square pulse is generated; the output pulse_out of the pulse is processed and sent to the subsequent analog circuit; the counter (count) stops counting when it receives a high level at the rdreq end. This signal comes from the receiving circuit. At this time, the counting result is sent to the operation compensation module (operate) for subsequent operation. At the same time, the clr end of the counter is cleared to wait for the next count; the adc module controls the A/D converter to convert the signal of the temperature compensation circuit into a digital quantity and send it to the compensation part of the operation compensation module for table lookup operation. The operation module is responsible for the final operation output.

Control and operation overall structure diagram

Figure 4 Control and operation overall structure diagram [page]

3. Conclusion

The experiment was conducted at room temperature (20°C) and pressure (1 standard atmosphere). The liquid to be tested was commonly used water, and its compression coefficient K=5×10-5/atmosphere. Through simulation (Figure 5), it can be obtained that the density of water is 1Kg/m3. This is the same as the actual result. Due to the large number of input signals, only some simulation signals are selected here. Through the analysis of the timing, it can be obtained that the overall delay of the entire circuit is 230ns, which shows that the system has a high response speed.

System Simulation Results

Figure 5 System simulation results

Keywords:FPGA Reference address:Design of Ultrasonic Liquid Density Sensor Based on FPGA

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