A CMOS temperature protection circuit with thermal hysteresis function

0 Introduction

With the wide application of integrated circuit technology and the continuous increase in integration, the power consumption of very large scale integrated circuits (VLSI) and the temperature inside the chip are constantly increasing. Temperature protection circuits have become an indispensable part of many chip designs. In this paper, a high-precision temperature protection circuit with thermal hysteresis function suitable for audio power amplifiers is designed under CSMC 0.5/μm CMOS process.

1 Circuit structure design

The entire circuit structure can be divided into a startup circuit, a PTAT current generation circuit, a temperature comparison circuit and its output circuit. The design and implementation of each circuit are introduced in detail below. The overall circuit diagram of the temperature protection designed in this article is shown in Figure 1.

1.1 Starting circuit

There is a very important problem in the bias circuit that is independent of the power supply, that is, the existence of the "degenerate" bias point. The current of each branch may be zero, that is, the circuit cannot enter the normal working state, so a startup circuit must be added to get rid of the degenerate bias point when the power is turned on. At the moment of power-on, there is no charge on the capacitor C, the gate of M7 presents a low voltage, M7~M9 is turned on, PD (low power pin) is low level, M3 pulls up the gate voltage of M6, because the width and length of M2 are relatively small in the design, and it is not turned on at this time, Q1~Q4 branches are turned on, and the circuit is out of the "degenerate point"; as the gate potential of M6 continues to rise, M2 is turned on, and the source potential of M3 drops sharply. At a certain moment, M3 is turned off, and the startup circuit is isolated from the bias circuit. The voltage across the capacitor C is constant, providing a suitable gate voltage for M7, and the bias circuit works normally. However, when PD is high level, M4 is turned on, pulling down the gate potential of M6 and M10, making the entire circuit in a low power state.

1.2 PTAT current generation circuit

In this part, M11, M12, M14, and M15 form a low-voltage cascode current mirror and have the same width-to-length ratio, so that the currents of the two branches are equal. Compared with the general cascode structure, this structure can increase the equivalent channel length, thereby increasing the output resistance and improving the PSRR performance of the circuit; and this two-tube combination structure can consume a lower voltage drop, thereby increasing the output voltage swing and improving the low-voltage working characteristics of the chip. As shown in Figure 1, in order for the cascode current mirror to work properly, M14 and M15 must work in the saturation region at the same time. Assume that the gate bias voltage of M15 is Vb, and the drain voltages of M14 and M15 are VA and VB respectively, that is:

The size of M15 is selected so that its overdrive voltage is always less than a threshold voltage to ensure that the inequality holds. Then, a suitable Vb is selected to minimize the voltage margin consumed by M11, M12, M14, and M15, which is equal to two overdrive voltages.

At the same time, the branch M7-M10 provides negative feedback for the bias circuit to reduce the influence of the power supply voltage on the bias current, so that the voltages at points X and Y are equal when the circuit is in a balanced state. However, the introduction of feedback also introduces unstable factors into the bias circuit. Here, M13 and M7 form a two-stage closed-loop op amp. To ensure the stability of the bias circuit, compensation must be performed. The main pole is set at the output end of the first-stage op amp M13 through capacitor C, thereby ensuring the stability of the circuit. If the area of ​​the Q3 emitter region is n times the area of ​​the Q4 emitter region, and the current flowing through is I, then:

Where: Vbe = VTln (Ic / Is) = (kT / q) ln (IC / IS); k is the Boltzmann constant; T is the absolute temperature; q is the electron charge. The saturation current IS is proportional to the area of ​​the emitter region, that is, IS3 = nIS4.

therefore:

From formula (9), it can be seen that the current flowing through R1 has nothing to do with the power supply and is only proportional to the absolute temperature, that is, the PTAT current is obtained.

1.3 Temperature comparison and output circuit

Since the forward conduction voltage of the BE junction of the transistor has a negative temperature coefficient, the voltage generated by the IV conversion of the PTAT current has a positive temperature characteristic. The different temperature characteristics of these two voltages are used to realize temperature detection and generate the output of the over-temperature protection signal.

M26~M30, M33, M34 form a two-stage open-loop comparator, and the inverter is connected to meet the requirements of high conversion rate. M31 and M32 are low-power transistors, and the role of M23~M25 is to form a positive feedback loop to prevent instability in the critical state, and at the same time create a hysteresis interval for the circuit.

The voltages at the two input terminals of the comparator are recorded as VQ and VR respectively; M17~M22 are used to mirror the PTAT current generated by the reference source circuit, where they have the same width-to-length ratio as M14. Therefore, the current flowing through these three branches is IPTAT. At room temperature, M25 is cut off, and R2 completes the IV transformation of the PTAT current, that is, VR=2IPTATR2. At this time, VR

2 Simulation results and analysis

The following are the simulation results of each part of the circuit. The simulation tool is Candence Spectre, and the model adopts CSMC's 0.5μm n-well CMOS process.

Figure 2 is the curve of PTAT current changing with temperature. The simulation results show that the curve has good linearity and conforms to the PTAT current characteristics. At room temperature, when the power supply is 5 V, the power consumption is only 0.4 mW. It can be seen that its power consumption is very low.

Figure 3 is a curve showing the variation of VR and VQ with temperature when the power supply voltage is 5 V. In the figure, there is a small step in the voltage on VR, which is the result of a sudden increase in current due to positive feedback when the comparator flips.

Figure 4 shows the change of the comparator output state when the temperature is scanned from 0 to 150°C and 150 to 0°C. As can be seen from the figure, when the temperature rises from low to high to 84.1°C, the circuit output state flips from low level to high level, realizing the over-temperature protection of the chip; only when the temperature drops back to 72°C, the circuit returns to its original state, realizing a hysteresis temperature of about 12°C. Changing the resistance value of R2 in Figure 1 can adjust the temperature range to meet different needs.

3 Conclusion

In order to ensure that the chip is not damaged due to over-temperature during operation, a temperature protection circuit is necessary. The temperature protection circuit designed here has high temperature sensitivity and low power consumption. Its thermal hysteresis function can effectively prevent the occurrence of thermal oscillation. Compared with the general temperature protection circuit that uses the BE junction of the transistor alone, it has higher sensitivity and accuracy and can be widely used in various power chips.