Design of Embedded CNC System Based on ARMS and FPGA

0 Preface

In the existing CNC systems, the motion controller is designed by using the computer numerical control system solution of industrial control computer plus motion control card. As the overall functions of industrial control computers become more and more complex, the requirements for the size, cost, power consumption and other aspects of the motion control system are becoming more and more stringent. The existing computer numerical control system gradually shows the disadvantages of serious resource waste and poor real-time performance in motion control. In addition, the openness, modularity and reconfigurable design of CNC systems are the hot topics in the current research field of CNC technology, in order to adapt to technological development and facilitate users to develop their own functions. Based on the hardware platform of ARM and FPGA, this paper adopts the design idea of ​​separation of strategy and mechanism to design an embedded CNC system with high openness. This CNC system not only has the main functions of the previous large-scale CNC system, but also has better operability and cutting performance, and its advantages in openness are more prominent, making the application software of the CNC system portable and interchangeable.

1 Overall solution of embedded CNC system based on ARM and FPGA

The structure of the embedded CNC system based on ARM and FPGA is shown in Figure 1. According to the idea of ​​module division, this paper divides the controller into three parts: human-computer interaction, interpolation algorithm and communication. The ARM in the system uses the 16/32-bit RISC microprocessor S3C2440A launched by Samsung, which uses the ARM920T core and has a core frequency of up to 400MHz. The FPGA uses the XC3S250E of the Spartan 3E series of Xilinx.

2 S3C2440A control system

As the control core of the CNC system, ARM is mainly responsible for decoding, calculating, and logically processing the part processing code and control information read from the data storage or directly obtained from the upper PC or network, completing the rough interpolation of the processing data, as well as the human-machine interface and data communication. The ARM system is the control core of the entire CNC system. Under the management of the embedded operating system, it uses time-sharing processing to realize the information processing and rough interpolation calculation of the entire system, inputs various control instructions through input devices such as keyboards and touch screens, and displays the real-time operating status of the CNC system through LCDs, indicator lights, etc., to achieve human-machine friendly interaction. Based on the S3C2440A controller, there are various communication interfaces, including RS232, RS485, Ethernet port, USB and other interface modules. File transfer and network control are realized through these interfaces.

The overall structure of the embedded CNC software system is shown in Figure 2. The system's software structure is mainly divided into two parts: operating system software and CNC application software. Since the CNC system is a real-time multi-task system with high real-time requirements, this system uses the μC/OS-II real-time operating system as the software platform to ensure the coordinated execution of each task.

To achieve the normal operation of the operating system on the S3C2440A microprocessor platform, it is necessary to modify the code related to the processor type. The work required for operating system porting is to rewrite three files, namely, rewrite the files OS_CPU.H, OS_CPU_A.ASM and OS_CPU_C.C. Among them, OS_CPU.H includes variables, macros and types related to the processor defined by the #define statement. Several assembly language functions are defined in OS_CPU_A.ASM, including the interrupt vector address of the interrupt service program. If some C compilers allow assembly language statements to be directly inserted into the C language, it is not necessarily necessary. Users can directly put the required assembly language code into the OS_CPU_C.C file.

3 Interface design between ARM and FPGA

In order to make the system work well as expected, reliable communication between ARM and FPGA must be realized in hardware. The solution adopted in this paper is to implement SRAM timing on FPGA and connect FPGA as a special memory device to the memory address space of ARM. In this way, only the SRAM driver needs to be written on the ARM side to write and read data on the FPGA side.

3.1 SRAM Timing

SRAM timing is divided into read timing and write timing. When the CPU reads SRAM, it first writes the correct address signal on the address line, followed by the chip select signal for the SRAM chip, and then the read signal for the chip. After a certain oscillation period, the CPU reads stable and valid data on the data line.

When the CPU writes to SRAM, it first writes the correct address line number on the address line, followed by the chip select signal for the SRAM chip, and then the write signal for the chip. Before the rising edge of the write signal, the CPU will prepare valid data on the data line so that the SRAM chip can write the data to the corresponding address unit on the rising edge of the write signal.

3.2 FPGA-side SRAM implementation

The interface signals required for communication between ARM and FPGA include address lines A0-A15, data lines D0-D15, chip select signal nCS, read signal nRD and write signal new. Each time, 16 bits of data need to be read and written. The SRAM timing is described in Verilog hardware language as follows:

It can be seen that only when the chip select signal and the read signal are pulled low and the write signal is still high, the value of the corresponding unit on the address line is output on the data line. In other cases, the FPGA will set the data line to a high-impedance state and give up control of the data line.

4 Design of DDA Precision Interpolator Based on FPGA

As FPGA devices and their development technologies mature, the use of FPGAs to implement motion control has shown great potential. Since FPGAs are designed to be parallel, multi-threaded, and have online programmability, they have the advantages of high speed and low cost, while overcoming the lack of flexibility of dedicated processors. FPGA-based DDA precision interpolators have powerful advantages over traditional software interpolation.

4.1 Digital integral interpolation algorithm

At present, the more mature CNC interpolation algorithms include point-by-point comparison method, minimum deviation method and digital integration method, and the digital integration method is also called digital differential analyzer (DDA). This method has the characteristics of fast operation speed, strong logic function, and uniform pulse distribution. It can realize primary, secondary and even higher-order curve interpolation and is easy to realize multi-axis linkage.

The digital integral interpolation algorithm converts the integral operation of the function into the summation operation of the variable. If the selected pulse equivalent is small enough, the error caused by replacing the integral with the summation operation can not exceed the allowed value. Two registers (function register and accumulator register) and a full adder are used to form a digital integrator. The unit cycle is selected to be small enough. The value in the function register is accumulated to the accumulator every unit cycle. If the accumulator overflows, a pulse is sent out to change the value of the function register in real time, and the speed regulation of the stepper motor can be completed. The flowchart of the hardware description language program designed for the DDA interpolation controller is shown in Figure 3.

4.2 FPGA Implementation of Digital Integral Interpolation

The finite state machine design method is adopted, and the digital integral interpolation of each axis is completed by the integral accumulator of a three-state machine. The FPGA development environment of this system is Xilinx ISE of Xilinx, and the whole system is fully functionally verified in combination with ModelSim simulation software. As shown in Figure 4, the top-level RTL level schematic diagram of the DDA interpolation module is shown in Figure 5. The input signals of the DDA interpolation module are the starting coordinates of each axis, the clock signal and the start signal, and the output signals are the pulse signal and direction signal of each axis.

The DDA interpolation module is simulated and verified using ModelSim simulation software. The starting coordinates of the test data are (0, 0, 0) and the end coordinates are (8, 15, 11). The simulation results are shown in Figure 5, showing that the system has completed the pulse distribution of the three axes very well.

4.3 Acceleration and deceleration control module

Acceleration and deceleration control is one of the key technologies of CNC system, and it is also the bottleneck for achieving high real-time performance of CNC system. In CNC system, in order to ensure that the machine tool does not produce impact, loss of step, overtravel or oscillation when starting or stopping, the pulse frequency or voltage of the feed motor must be accelerated and decelerated. That is, when the machine tool accelerates and starts, the pulse frequency added to the motor is guaranteed to gradually increase; and when the machine tool decelerates and stops, the pulse frequency added to the motor is guaranteed to gradually decrease. At present, the commonly used control methods for motor acceleration and deceleration are trapezoidal acceleration and deceleration control and S-shaped acceleration and deceleration control. This design adopts two control schemes to meet the requirements of different working occasions.

4.3.1 Trapezoidal acceleration and deceleration

Trapezoidal acceleration and deceleration refers to an acceleration and deceleration process in which the acceleration is constant and the speed curve is a trapezoid. The trapezoidal acceleration and deceleration control algorithm is simple and easy to implement, but the discontinuity of the acceleration curve during the acceleration and deceleration process will cause vibration and impact of the drive mechanism. Under normal circumstances, the trapezoidal acceleration and deceleration motion process is divided into three stages as shown in Figure 6: acceleration stage, constant speed stage and deceleration stage.