STM8 CRC calculation

STM8 CRC calculation

CRC check is only used to ensure the reliability of communication. Separate CRC calculators are used for data transmission and data reception. CRC is calculated by performing a programmable polynomial operation on each received bit. The CRC calculation is performed on the sampling clock edge defined by the CPHA and CPOL bits in the SPI_CR1 register.

CRC calculation is enabled by setting the CRCEN bit in the SPI_CR1 register. The CRC registers (SPI_RXCRCR and SPI_TXCRCR) are reset at the same time when the CRCEN bit is set. When the CRCNEXT bit of SPI_CR2 is set, the content of SPI_TXCRCR will be sent after the current byte is sent.

If there is already a byte in the Tx buffer, the CRC value will be sent after the byte is sent. During the process of sending the CRC value, the CRC calculator is turned off and the value of the CRC register remains unchanged.

If during the transmission of the SPI_TXCRCR value, the received shift register value does not match the SPI_RXCRCR value, the CRCERR flag in the SPI_SR register is set.

SPI communication can use the STM8's CRC by following these steps:

• Set the values ​​of CPOL, CPHA, LSBFirst, BR, SSM, SSI, and MSTR;
  

• Enter the polynomial in the SPI_CRCPR register;
  

• Enable CRC calculation by setting the CRCEN bit in the SPI_CR1 register. This operation will also clear the registers SPI_RXCRCR and SPI_TXCRCR.
  

• Set the SPE bit of the SPI_CR1 register to start the SPI function;
  

• Start communication and maintain communication until only the last byte is left to be sent or received;

• When the last byte is written into the transmit buffer, the CRCNext bit of SPI_CR2 is set to instruct the hardware to send the CRC after the last data segment is sent. During the CRC transmission, the CRC calculation stops;

• When the last byte is sent, the SPI sends the CRC and the CRCNext bit is reset. Similarly, the received CRC is compared with the SPI_RXCRCR value. If the comparison does not match, the CRCERR flag on the SPI_SR is set, and an interrupt is generated when the ERRIE of the SPI_ICR register is set.
  

Note: When the SPI clock frequency is high, the user must be careful when using CRC check transmission. During the entire transmission period using CRC data check, the CPU time should be used as little as possible. In order to avoid errors when receiving the last data and CRC, function calls should be disabled during the data transmission process with CRC check value.