STM32 study notes-window watchdog

1. Window Watchdog (WWDG): Usually used to monitor software faults caused by external interference or unforeseen logic conditions when the application deviates from the normal operating sequence.

2. Window watchdog working diagram:

T[6:0] is the lower seven bits of WWDG_CR, and W[6:0] is the lower seven bits of WWDG->CFR. 

It is the counter of the window watchdog, and W[6:0] is the upper window of the window watchdog. The lower window value is fixed (0X40). When the counter of the window watchdog is refreshed outside the upper window value or is lower than the lower window value, a reset will occur. The upper window value (W[6:0]) is set by the user. The window value is designed according to actual requirements, but it must be ensured that the window value is greater than 0X40, otherwise the window will not exist.

3. Related registers

a. Control register ( WWDG_CR ): Each bit is described as follows

Only the lower eight bits of WWDG_CR are valid. T[6:0] is used to store the watchdog counter value, which is updated at any time. Each window watchdog counting cycle (4096×2^WDGTB) is reduced by 1. When the counter value changes from 0X40 to 0X3F, a watchdog reset will be generated.

The WDGA bit is the activation bit of the watchdog. This bit is set to 1 by software to start the watchdog. It should be noted that once this bit is set, it can only be cleared after a hardware reset.

b. Configuration register ( WWDG_CFR ) L

EWI is an early wake-up interrupt, which reminds us some time before a reset (T[6:0]=0X40) that we need to feed the dog, otherwise it will be reset!

c. Status Register ( WWDG_SR )

This register is used to record whether there is an early wake-up flag at present. Only bit 0 of this register is valid, and the others are reserved bits. When the counter value reaches 40h, this bit is set to 1 by hardware. It must be cleared by software writing 0. Writing 1 to this bit is invalid. Even if the interrupt is not enabled, this bit will be set to 1 when the counter value reaches 0X40.

4.WWDG library function configuration steps:

1) Enable WWDG clock: WWDG is different from IWDG. IWDG has its own independent 40Khz clock, while WWDG uses the PCLK1 clock. You need to enable the clock first.

operate: 

RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE); // WWDG clock enable

2) Set the window value and frequency division number

Function to set window value: void WWDG_SetWindowValue(uint8_t WindowValue); //Entry parameter is window value

The function to set the prescaler is: void WWDG_SetPrescaler(uint32_t WWDG_Prescaler); //The entry parameter is the prescaler value

3) Enable WWDG interrupt and group

The function to enable WWDG interrupt is: WWDG_EnableIT(); // Enable window watchdog interrupt

Interrupt priority configuration, use NVIC_Init() function.

4) Set the initial value of the counter and enable the watchdog

void WWDG_Enable(uint8_t Counter); //This function sets the initial value of the counter and enables the window watchdog.

5) Write interrupt service function

Finally, write the interrupt service function of the window watchdog, and use this function to feed the watchdog. Feeding the watchdog should be fast, otherwise when the window watchdog counter value decreases to 0X3F, it will cause a soft reset. In the interrupt service function, the EWIF bit of the status register should also be cleared.

5. Library function implementation

/*Window watchdog initialization*/

void WWDG_Init(u8 tr,u8 wr,u32 fprer)

{ 

    RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE); // WWDG clock enable

    WWDG_SetPrescaler(fprer); ////Set IWDG prescaler value

    WWDG_SetWindowValue(wr); //Set window value

    WWDG_Enable(tr); //Enable watchdog and set counter.                  

    WWDG_ClearFlag();

    WWDG_NVIC_Init(); //Initialize window watchdog NVIC

    WWDG_EnableIT(); //Enable window watchdog interrupt

} 

//Reset the value of the WWDG counter

void WWDG_Set_Counter(u8 cnt)

{

    WWDG_Enable(cnt);    

}

//Window watchdog interrupt service routine

void WWDG_NVIC_Init()

{

    NVIC_InitTypeDef NVIC_InitStructure;

    NVIC_InitStructure.NVIC_IRQChannel = WWDG_IRQn;    //WWDG中断

    NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; //Preempt 2, sub-priority 3, group 2  

    NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //Preempt 2, sub-priority 3, group 2 

    NVIC_InitStructure.NVIC_IRQChannelCmd=ENABLE; 

    NVIC_Init(&NVIC_InitStructure); //NVIC initialization

}

void WWDG_IRQHandler(void)

    {

    // Update WWDG counter

    WWDG_SetCounter(0x7F); //When this sentence is disabled, the window watchdog will reset

    // Clear EWI flag */

    WWDG_ClearFlag(); //Clear early wake-up interrupt flag

    // Toggle GPIO_Led pin 7 */

    LED1=!LED1;

    }

Note: For specific function implementation, please refer to the library function file: stm32f10x_iwdg.c

reference:

《Atomic Library Function Tutorial》