How the program is debugged in RAM and how it is run after being solidified

After the program starts running, the RW and ZI segments need to be moved to the RAM. After the program is downloaded into the Flash, how are the RW and ZI segments moved to the RAM after power-on? Note that after initializing the .s file, IAR and ADS do not jump directly to the main function to execute. IAR jumps to?main and ADS jumps to the __main function. In these functions, according to the configuration of the icf file, the RW and ZI segments are moved to the RAM area specified by the icf file. If the runtime domain of the program is in the off-chip RAM, when does the program initialize the off-chip RAM controller? Because the beginning of the .s file is CODE RO, no RAM space is required, so the off-chip RAM can be configured in the .s file. There is another problem, which must be paid attention to during hardware design. If the program needs to be solidified in the external Flash, it must be noted that the external Flash must be a chip that the default off-chip bus supports after the chip is powered on.

How programs are debugged in RAM

For the convenience of debugging, sometimes the program does not need to be downloaded into the flash for debugging, but runs directly in the RAM. Set the ROM and RAM addresses in the icf file to the addresses of the hardware RAM, turn off the Flashloader, and the program will run in the RAM. But the problem arises again, because sometimes we want to debug the code in the external RAM, so the external RAM controller needs to be initialized before the code is downloaded into the RAM. How can it be achieved? IAR is implemented through the .mac file. It is executed before the program is downloaded. The program in the mac file, the following is an example

execUserFlashInit()
{
    __writeMemory32(0x1000ffef, 0xffe00000 , "Memory");
    __writeMemory32(0x0f000114, 0xE002C014, "Memory"); 
}

This example is an example of LPC initialization of external RAM. After configuring the external RAM, you can run the code in it.

IAR download of the program

1.       The file is downloaded and run in the on-chip Flash

This is the simplest and most commonly used method. Generally, ARM chips have on-chip Flash, and IAR will download binary executable files to Flash through Flashloader. The download method is as follows: if you want to download program B to the chip, IAR first downloads a program A (a program pre-written by IAR) to the RAM on the chip, and then uses this program A to interact with Flashloader through JTAG to complete the download of program B.

2.       Download the file in the off-chip Flash

The program A downloaded into RAM by IAR must support the off-chip Flash and be able to erase the off-chip Flash. Often this program needs to be written by yourself. The download mechanism of HJTAG is the same. HJTAG lists many chips supported by HJTAG. The so-called support means that HJTAG has program A for these chips. In HJTAG, the address of the RAM to which program A will be downloaded must be specified, and the RAM at this address must be available. For example, if an off-chip SDRAM is used, the SDRAM controller must be initialized. This is done in the Init Script of HJTAG and in the mac file of IAR.

3.       Download files in on-chip RAM, download files in off-chip RAM

Since these two methods do not require the participation of Flashloader, the loading domain and runtime domain of the program are the same. The program does not need to be moved after it is running, so you only need to specify the RAM address of the runtime domain to IAR. If it is internal RAM, it is very convenient. Just set the address to internal RAM in the icf file. If it is external RAM, initialize the external SDRAM controller or other RAM in the mac file, and then IAR can put the program in the initialized external RAM and run it.