TSMC's 2nm process has limited actual performance improvement, and Samsung is expected to catch up in 2025

At a technical forum a few days ago, TSMC, the world's largest foundry, announced its chip process roadmap, including five 3nm processes, and will launch a 2nm process in 2025, using GAA transistor technology. According to TSMC, compared with the 3nm process, the 2nm process is 10-15% faster at the same power consumption, and the power consumption is reduced by 25-30% at the same speed.

Although these indicators look good, the density improvement of the 2nm process is very limited, only increasing by 10%, which is far from meeting the requirement of doubling the density of Moore's Law. It is also far behind the density improvement of at least 70% of TSMC's previous new process.

The difficulty of the 2nm process has obviously become a challenge, which makes it increasingly difficult for TSMC to increase density in the future. However, for competitors, TSMC's squeezing of the toothpaste this time has made them secretly happy and given them a chance to catch up.

Not only will Intel's 20A/18A process put pressure on TSMC's 2nm in 2024-2025, but Samsung will also face greater trouble. Samsung uses GAA transistors more aggressively than TSMC and will use them in the 3nm process.

According to Samsung's plan, the 3nm GAA process is expected to be put into trial mass production in June. Compared with the 5nm process, the performance of this process is improved by 15%, the power consumption is reduced by 30%, and the chip area is reduced by 35%.

Samsung has also set the mass production time of its 2nm GAA process at 2025, which is almost the same as TSMC. This is the first time in recent years that Samsung has caught up with TSMC in mass production of new processes. Previously, it was 1-2 years slower, resulting in a lack of competitiveness.