Advantages of Smart Sensor Interfaces in Data Acquisition

The system architecture of most analog measurement systems is relatively straightforward. The core of this architecture is usually a host processor that controls and retrieves data from one or more ADCs. At one end of the signal chain, the host-controlled sensor feeds the data to the ADC. There is not much that can be done to analyze the above system and determine what optimizations need to be made without sacrificing performance. It is not easy to determine what functions need to be integrated into the functional blocks, and it is difficult to directly control the sensor front end. In addition, the host processor is usually predetermined by a series of other requirements, which are mainly determined by software requirements such as memory size and CPU speed. For the analog designer responsible for the back end of the system, the ADC is usually the only thing that can be optimized. However, at this point, the digital interface is basically fixed, which is also mainly determined by the requirements of the host processor. Of course, many host processors now have very high performance and flexible integrated ADC functions, and many of these microcontrollers (MCUs) are ideal for a variety of application requirements. However, it is important to emphasize again that the choice of MCU is determined by a variety of requirements, and analog functions are only part of it. Is there any other way besides spending a lot of time and taking high risks to develop expensive ASICs? Of course, there is a way. Instead of integrating analog functionality with the host processor, what if the digital intelligence could be integrated into the ADC? This would allow for a “smarter” device that meets the analog performance requirements of the sensor front end, but has enough flexibility to interface with the system’s host processor. There are more benefits to this approach.

Figure 1 illustrates this concept and the various approaches described above.

Figure 1. The evolution of smart ADC data acquisition systems Little intelligence goes a long way This is undoubtedly not a new concept, but it is often overlooked. Smart ADC data acquisition systems should be used whenever possible, and their system-level impact goes far beyond what has been described previously. Typically, designers consider the physical size or footprint of the smart processor solution, and of course price is also a very important factor. Price is often the limiting factor in most high-volume applications, forcing designers to use less efficient standalone solutions that compromise integration. The advantage of the smart ADC system architecture is that both digital and analog design can be extremely flexible, which also provides great flexibility for software development. The integrated CPU and digital peripherals of the smart ADC solution enable simpler A/D control and data processing functions. The ADC is not only fully programmable, but can be controlled over the air without interacting with the host CPU. In addition, the smart ADC can act as an analog pre-processor, not only capturing the converted digital data, but also processing the data before passing it to the system host. This simplifies functions such as data averaging and even more complex data filtering. To illustrate how these features can reduce the host load, consider the simple example of an external 16-bit ADC communicating over a 3-wire SPI interface. The host not only has to configure the ADC and wait for each conversion to complete, but also retrieve each 16-bit result and process it to average. Even in the case where the ADC is integrated with the host processor, it is only the data communication that can be optimized. The host still has to process the data, calculate the average, and provide all ADC control and configuration functions. Compare this simple and inefficient system to a smart ADC system that uses the same host functions, but the host only has to retrieve the data from the "smart" ADC. All ADC control functions and pre-processing of the data and averaging are performed by the smart ADC, freeing up the host to perform higher-level functions and benefit the end application. A smarter MCU is the solution The ultra-low-power MSP430F2013 MCU is an excellent example of this type of smart ADC. All ADC control and data processing is removed from the host, which not only increases flexibility but also enhances the efficiency of the entire system. This may not seem like much in terms of cost reduction, memory capacity, and CPU throughput, but we need to consider that some tasks must be processed tens, hundreds, or even thousands of times per second. Therefore, the advantages that can be achieved by intelligent ADCs are extremely obvious, but if designers only consider using simple ADCs during system design, they will force the host to handle a lot of data acquisition work, which will cause unnecessary consumption. The advantages and functions brought by smarter ADCs go far beyond the scope of A/D conversion and data processing. At a higher level, the 2KB on-chip flash memory of the MSP430F2013 can store calibration data and sensor compensation tables for temperature changes to compensate for the lack of sensor sampling information. In addition, the flash memory and 128B RAM can also store data logs and multi-sample buffers. The system host can use the remaining available memory to store various other data. The interface to the host or other system elements such as LED indicators, switches, or external digital clocks has up to 10 general-purpose I/O connections, which is significantly simplified. Built-in communication interfaces that can handle SPI or I2C protocols provide a simple, optimized, and customizable host data port. One of the key advantages of the MSP430 ultra-low power architecture also extends further into the system analog space, enabling a very flexible and manageable power architecture to fully meet current needs. Since the processor wakes up from sub-microampere standby current in less than 1 microsecond, this solution helps us significantly reduce average system power requirements.

Figure 2 shows a concept of how the system utilizes the host and the smart ADC.

Figure 2. Smart ADC System Architecture Concluding Thoughts The next time you design a mixed-signal application and are considering using an external ADC, consider your options. Using a simple external ADC may not be the best solution, especially when a smart ADC is more appropriate. A “smart sensor interface” combines the processing power of a 16-bit CPU with that of a 16-bit ADC, greatly simplifying the design effort, especially in a smaller solution size, and at a cost that is comparable to, or sometimes even lower than, a dedicated ADC solution. The benefits of this data acquisition system architecture extend to other design areas, such as reduced power consumption, improved system scalability, and differentiation of the end device.