Discussion on the key to extend battery life in DSP system--DC/DC regulator

Introduction

A long-standing challenge for designers of MP3 players, personal media players, digital cameras, and other portable consumer applications is to achieve high performance and low power consumption. These battery-powered systems typically use an embedded digital signal processor (DSP) that is used at maximum capacity when the system is processing multimedia applications and consumes minimal power when the system is in sleep mode. Battery life is a critical metric in handheld products, and the success of the product is directly related to the efficiency of the power supply system.

A key component in such systems is the step-down DC-DC switching regulator, which can efficiently derive a lower supply voltage from a higher voltage, such as 1V from 4.5V. As a regulator, it must maintain a constant voltage and respond quickly to changes in input voltage and load current. The architecture discussed in this article offers excellent voltage regulation performance, high efficiency, and fast response.

Anatomy of a Switching Regulator

Figure 1 shows a typical application circuit for the Analog Devices ADP2102, a low duty cycle, 3 MHz synchronous rectifier step-down converter. The ADP2102 is available in multiple configurations with fixed and adjustable output voltages. Here the ADP2102 is connected in a fixed output voltage configuration to generate a 300 mA, 0.8 V output voltage from an input voltage of 5.5 V. Next is an application example with adjustable output voltage.

Figure 1. Using the ADP2102 to generate a 0.8 V output from a 5.5 V input

Here is a brief explanation of how the circuit works: The divided DC output voltage is compared to an internal reference source in the error amplifier, and then the output of the error amplifier is compared to the output of the current sensing amplifier to drive a monostable. The monostable is in a quasi-stable state for a time period determined by VOUT/VIN. The monostable turns on the upper gate transistor, and the current in the inductor L1 gradually increases. When the monostable state of the monostable ends, the transistor turns off, and the current in the inductor L1 gradually decreases. After a time interval determined by the minimum off-time timer and the minimum ("valley") current, the monostable is triggered again. The monostable timer on the chip uses input voltage feedforward to maintain a constant frequency in the steady state.

The oscillation continues at an indeterminate frequency (approximately 3MHz), but can be deviated from this frequency if necessary in response to transient changes in the line and load so that the output voltage remains constant and the average value of the inductor current is maintained at the current value required by the output load.

The method described above is relatively novel. For many years, the main method of DC-DC conversion has been the constant frequency peak current method, which is also called trailing edge modulation when implemented in a step-down DC-DC converter. For a detailed description of this method, an evaluation of its advantages and disadvantages, and the constant on-time valley current mode converter described above, please refer to other technical articles.

The ADP2012 also has undervoltage lockout, soft start, overtemperature protection, and short-circuit protection, and has a feedback accuracy of ±1%. This architecture can make the on-time of the main switch as low as 60 ns or less.

Figure 2 shows the typical waveforms under different conditions. Figure 2a shows the low duty cycle when ILOAD=600mA and the voltage decreases from VIN=5.5V to VOUT=0.8V. As shown in the figure, at a switching frequency of 3MHz, a minimum on-time of 45ns can be obtained.

Figure 2b shows the load current and inductor current waveforms when the load current suddenly increases by 300mA.

Figure 2c shows the load current and inductor current waveforms when the load current suddenly decreases by 300mA.

Figure 2d shows that there is no subharmonic oscillation at a duty cycle of 50%, which must be considered in the design when using peak current mode control. There is also no subharmonic oscillation when the duty cycle is greater or less than 50%.

Figure 2a. VIN = 5.5 V, VOUT = 0.8 V, minimum on-time = 45 ns

Figure 2b. Sudden load transient response (ILOAD = 300 mA)

Figure 2c. Sudden load drop transient response (ILOAD = 300 mA)

Figure 2d. Duty cycle = 50%, VIN = 3.3 V, VOUT = 1.8 V, ILOAD = 300 mA

Dynamic Voltage Scaling in DSP Applications

In portable applications using DSPs, the core voltage and I/O voltage of the DSP are usually provided by switching converters, which requires the use of high-efficiency DC-DC converters for battery-powered applications. The regulator that provides the core voltage must be able to dynamically change the voltage based on the processor clock speed or dynamically change the voltage as instructed by the software. In addition, the small size of the overall solution is equally important.

Here, the internal regulator of the Blackfin processor is replaced with an external high-efficiency regulator to improve the system power supply efficiency in battery-powered applications. In addition, the control software for the external regulator is introduced.

动态电源管理

处理器的功耗与工作电压（VCORE）的平方成正比，并且与工作频率（FSW）成正比。因此，降低频率能够使动态功耗线性下降，而降低内核电压可以使动态功耗指数下降。

在对功耗敏感的应用中，当DSP仅简单地监视系统活动或者等待外部触发信号时，在保持供电电压不变的情况下改变时钟频率，这对降低功耗是非常有用的。然而，在高性能电池供电的应用中，仅改变频率并不能显著节约电能。Blackfin处理器以及其他的具有高级电源管理功能的DSP可以依次改变内核电压和频率，由此可以在任何情况下均实现最优的电池利用。

ADSP-BF53x系列Blackfin处理器中的动态电压的稳压通常是由内部电压控制器和外部MOSFET实现的。该方法的优点在于，可以将单电压（VDDEXT）施加到DSP子系统，从MOSFET得到的所需的内核电压（VDDINT）。通过内部寄存器可以软件控制内核电压，以便于控制MIPS，并且最终控制能耗，由此实现最优的电池寿命。

为了完整地实现Blackfin内部稳压方案，需要一个外部MOSFET、肖特基二极管、大电感和多个输出电容器，该解决方案价格相对昂贵，效率却很差，而且占用的PCB板面积是相对较大的，这给系统设计人员带来了很大的矛盾，在集成稳压器中需要使用大电感和电容器，不利于消费者所希望的便携式设备尽可能小型化。该集成稳压控制器的效率是相对较低，通常仅为50%~70%，因此该方法不太适用于高性能手持式电池供电应用。

外部稳压

通过新型DC-DC开关转换器设计方法，可以将Blackfin集成方法本身的效率提高到90%或更高。而且，在使用外部稳压器时可以减小外部元件的尺寸。

还可以使用多种动态电压调整（DVS）控制方案，包括开关电阻器（其在某些情况中可由DAC实现）和脉宽调制（PWM）（其可以实现与内部方法相同的精度）。不论使用哪种方案，其必须能够通过软件控制改变稳压电平。上述稳压控制方法在内部稳压器是集成的，而在外部稳压中必须通过外加器件来实现。

本文描述了两种使用ADP2102同步DC-DC转换器调节DSP内核电压的方法，当处理器在低时钟速度下运行时，可动态地将内核电压从1.2 V调节到1.0V.

ADP2102高速同步开关转换器在由2.7V~5.5V的电池电压供电时，可以使内核电压低到0.8 V.其恒定导通时间的电流模式控制以及3MHz开关频率提供了优良的动态响应、非常高的效率和出色的源调整率和负载调整率。较高的开关频率允许系统使用超小型多层电感和陶瓷电容器。ADP2102采用3 mm×3 mm LFCSP封装，节约了空间，仅需要三或四个外部元件。而且ADP2102包括完善的功能，诸如各种安全特征，如欠压闭锁、短路保护和过热保护。

图3示出了实现DVS的电路。ADSP-BF533 EZ-KIT Lite评估板上的3.3 V电源为降压转换器ADP2102供电，使用外部电阻分压器R1和R2将ADP2102的输出电压设定为1.2 V.DSP的GPIO引脚用于选择所需的内核电压。改变反馈电阻值可以在1.2 V~1.0 V的范围内调节内核电压。通过与R2并联的电阻R3，N沟MOSFET可以修改分压器。相比于R3，IRLML2402的RDSon较小，仅为0.25Ω。3.3 V的GPIO电压用于驱动MOSFET的栅极。为了获得更好的瞬态性能并改善负载调整率，需要加入前馈电容器CFF.

Figure 3. Dynamic voltage scaling of the ADP2102 using external MOSFETs and Blackfin PWM control

For a dual-level switch, typical application requirements are:

DSP core voltage (VOUT1) = 1.2 V

DSP core voltage (VOUT2) = 1.0 V

Input voltage = 3.3 V

Output current = 300 mA

Using high-value divider resistors minimizes power loss. The feedforward capacitor reduces the effect of gate-to-drain capacitance during the switching process. The overshoot or undershoot caused by this transient can be minimized by using a smaller feedback resistor and a larger feedforward capacitor, but this comes at the expense of additional power dissipation.

Figure 4 shows the output current IOUT, the output voltage VOUT, and the control voltage VSEL. When VSEL is low, the output voltage is 1.0 V, and when VSEL is high, the output voltage is 1.2 V.

Figure 4. Adjusting the feedback resistor below via a MOSFET

A simpler method to generate two different voltages for DVS uses a control voltage VC to inject current into the feedback network through an additional resistor. Adjusting the duty cycle of the control voltage changes its average DC level. Thus, using one control voltage and resistor, the output voltage can be adjusted. The following formulas are used to calculate the values ​​of resistors R2, R3 and the control voltage amplitude levels VC_LOW and VC_HIGH.

（1）

(2)

For VOUT1 = 1.2 V, VOUT2 = 1.0 V, VFB = 0.8 V, VC_LOW = 3.3 V, VC_HIGH = 0 V, and R1 = 49.9 kohm, R2 and R3 can be calculated as follows

（3）

(4)

This method produces a smoother transition. Unlike the MOSFET switching method, any control voltage that can drive a resistive load can be used for this scheme, while the MOSFET switching method can only be used for control signal sources that drive capacitive loads. This method can be applied to any output voltage combination and output load current. Therefore, by adjusting the core voltage as needed, the power consumption of the DSP can be reduced. Figure 5 shows the transition between two output voltages using this current injection method.

Figure 5. Dynamic voltage adjustment of the ADP2102 using control voltage VC.

Figure 6. Adjusting the feedback resistor below by controlling the voltage