Revealing the circuit module design of speech recognition system using DSP and HMM

Today's society is an era of digital information. Credit card numbers, telephone voice dialing, personal ID numbers, electronic passwords, etc. all have digital characteristics. At the same time, with the development of speech recognition technology, speech recognition of numbers has become possible. Digital speech recognition can recognize the numbers spoken by users and provide users with the most natural, flexible and economical human-machine interface, thereby effectively solving a large number of data entry problems encountered in the military and civilian fields. Moreover, due to the increasing popularity of telephone networks, digital automatic speech recognition can be used for telephone demographics, remote authentication of remote stock trading numbers, etc. Therefore, digital speech recognition has very high practical value.

Hardware circuit connections

The voice signal acquisition module mainly includes the input and output analog channels of the voice signal, the connection between DSP and AD50, the connection between DSP and AD50 peripheral equipment, etc. Among them, the peripheral device connections between DSP and AD50 include power circuits, clock circuits, reset circuits, memory expansion circuits, decoupling circuits, etc. The connections of these circuits can be viewed in the relevant chip information. The front-end and back-end processing of voice signals mainly consists of input and output analog channels. The main function of these two circuits is to process the signal and minimize the noise introduced by the input and output. At the same time, the input and output amplification coefficient can also be adjusted to make the voice signal suitable for various power amplifiers to obtain the best voice effect. In order to achieve better results, the analog signal input of AD50 adopts differential input mode, that is, using two operational amplifiers to convert the single-ended input signal into a differential input signal. The circuit connection is shown in Figure 3.5. Using differential signals, one signal and one negative signal enter the acquisition system at the same time. If random noise appears at this time, part of the noise can be effectively eliminated by adding and subtracting negative signals.

AD50 differential input circuit

The D/A output of AD50 is a differential signal and can directly drive a 600-ohm load.

Differential output circuit

To make the TLC320AD50 work properly, it is also necessary to connect the power supply and decoupling circuit as well as some functional pins including frame synchronization delay output, voltage pull-down, output monitoring, reference voltage filter output, etc. The specific connections are shown in Figure 3.7.

TLC320AD50 peripheral circuit

The DSP is connected to the AD50 through a multi-channel buffered serial port. DSP can connect a buffered serial port to up to 3 AD50 chips. This system uses the connection method of DSP as the master device and AD50 as the slave device. As shown in Figure 3.8, the clock signal MCLK of AD50 is provided by the output TOUT0 of timer 0 of DSP, and the clock frequency can be changed by setting timer 0. The shift clock output SCLK of the AD50 is connected to the receive clock pin CLKR0 of the buffered serial port 0 of the DSP, and the frame synchronization signal FS is connected to the FRXO of the buffered serial port 0 of the DSP. The FC pin of AD50 is connected to the general-purpose I/O pin XF of the DSP for controlling secondary serial communication. In Figure 3.8, DR0 of the DSP is the input, and the rest are outputs.
-----------------------