TMS320C6748 DSP Development Kit (LCDK)

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TMS320C6748 DSP Development Kit (LCDK) [Copy link]

The TMS320C6748 DSP The DSP central processing unit (CPU) contains eight functional units, two register files, and two data paths as shown in Figure 3-2. The two general register files (A and B) each contain 32 32-bit registers for a total of 64 registers. General registers can be used for data or can be data address pointers. The supported data types include packed 8-bit data, packed 16-bit data, 32-bit data, 40-bit data, and 64-bit data. Values greater than 32 bits (such as 40-bit long or 64-bit long values) are stored in register pairs, placing the 32 LSBs of data in the even register and the remaining 8 or 32 MSBs in the next higher register (always an odd register). The eight functional units (.M1, .L1, .D1, .S1, .M2, .L2, .D2, and .S2) can each execute one instruction per clock cycle. The .M functional unit performs all multiplication operations. The .S and .L units perform a common set of arithmetic, logic, and branching functions. The .D unit primarily stores to the register file and stores results from the register file to memory.

TMS320C6748 Fixed-Point and Floating-Point DSP Data Sheet (Rev. G)

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