Give me an FPGA, and I can pry open all the display interfaces and panels

The whole story of this issue needs to start with HDR.

What is HDR? HDR is the abbreviation of "High Dynamic Range", which means the "high dynamic range" of the image. In computer graphics and film photography, it is a set of technologies used to achieve a larger exposure dynamic range (that is, a larger contrast between light and dark) than ordinary digital image technology.

In recent years, HDR has evolved from a professional term into a commercial term for consumer promotion. Manufacturers of mobile phones, cameras, game consoles, etc. all say that their devices support HDR. In short, HDR has attracted widespread attention from panel companies to the TV industry and even consumers because it can restore more image details very clearly.

At a recent "Xilinx TV and Display Technology Media Exchange Conference", Bob Feng, Marketing and Business Development Director of the Greater China Core Market Division of Xilinx, a Silicon Valley company in the United States, started with HDR and went on to analyze the control chip technology and current status of the display industry.

HDR content and displays actually include three considerations: dynamic range, optoelectronic/electro-optical transfer function (OETF/EOTF), and wide color gamut.

HDR provides a wider range from black to white, or what is often referred to as whiter whites or blacker blacks. White brightness can be measured up to 10,000 cd/m2 or nits, while black brightness can be as low as zero. When determining the brightness range, the relationship between the hue gradation or brightness shape and the pixel value should also be considered. The OETF/EOTF or gamma curve describes the relationship between the pixel value and the corresponding luminescence. In addition, a wider color range is included to achieve more realistic color saturation levels, thereby achieving more realistic color performance.

As shown in the figure below, the left side is the produced content, which is similar to a color bucket and needs to be mapped to the display as much as possible. In order to best present HDR content with a large color capacity to a given display with a small color capacity, the appropriate conversion or mapping process must be completed. The left side requires the OEM factory to design the main chip, while the right side for the panel factory requires a TCON (timing controller) chip to solve the tone mapping and color volume conversion.

In terms of screen technology, as can be seen from the figure below, the only screen that can truly represent HDR is the part in the red box.

According to Feng Yi and related materials, each of these new panels requires a specific color capacity mapping algorithm in its TCON to properly customize various color gamut and contrast inputs such as Hybrid Log-Gamma (HLG), HDR10, and Dolby Vision.

The algorithm is designed to provide a conversion function to correctly match the gamma curve characteristics of each panel, and can be performed multiple times according to the needs of each supplier. However, HDR content is often accompanied by high resolution and fast refresh rate requirements, which greatly increases the variety and bandwidth requirements of TCON input and output interfaces.

In the past, the TCON was designed through dedicated devices such as application-specific integrated circuits (ASICs) or application-specific semiconductor products (ASSPs). “This means that when you design a TCON, you need to design an ASIC based on the different technologies of LCD screens, OLED screens, Dual Cell stacked screens, and Micro LED screens,” said Feng Yi. “Correspondingly, different resolutions, such as FULL HD (FHD), UHD, and 8K, all require a system design, which is a huge burden for screen manufacturers.”

Feng Yi gave an example, saying that currently, except for LG, other panel manufacturers have not been able to completely solve the OLED yield problem. Developing ASIC at this time is not only difficult but also meaningless. In addition, for example, the newly released stacked screen TV, although it is based on the more mature LCD technology to solve the backlight density and effectiveness problems, it also requires a new TCON to take into account the inner and outer screens.

For Xilinx FPGA, you can choose the corresponding FPGA product series based on the performance requirements of FHD, UHD, and 8K.

As for the product, it is introduced that for FULL HD, the main frequency is 150 MHz, and Xilinx Spartan-6 is a very suitable chip; when it evolves to 4K, the main frequency changes from 150 MHz to 600 MHz, and Kintex-7 is needed to achieve it. Similarly, for 8K, KintexUltrascale is more suitable. In this regard, Feng Yi also said that Kintex-7 and KintexUltrascale have faster main frequencies. For example, Kintex-7 can generally run at 300MHz, and only dual-pixel parallel buses are needed to realize 4K processing internally. Compared with the four-pixel bus selection of other FPGAs, Xilinx's solution can have advantages in logic scale cost and power consumption.

Looking at the content-to-panel line, as shown in the figure below, the conventional solution for smart TVs is to add a Mobile SoC to the mainstream TV SoC, and then design a TCON through ASIC/ASSP. At this point, panel manufacturers have to face various interfaces and SoCs. If the FPGA TCON solution is adopted, the four-level selection can be reduced to three levels, and the V-by-One interface can also be eliminated.

"The biggest difference between the three-chip architecture and the two-chip architecture is that it saves a main chip - the 4K TV SoC. The design becomes relatively easy, saving the cost of design time. Replacing the TV main chip with a Mobile SoC can better integrate the massive content of the Internet, whether it is professional streaming services or emerging social media and self-media." Feng Yi said.

From the market perspective, Feng Yi said that the FPGA solution will not completely replace the TCON ASIC/ASSP solution, but will coexist. ASIC is a very mature solution in the market. However, with the emergence of emerging panels and technologies, manufacturers can quickly enter the market through FPGA TCON solutions without being limited by ASIC design.

In the customer case, Feng Yi cited the example of Vision Display Optoelectronics, whose 8K Media Player is a player that stores and outputs 8K resolution sources and supports existing mainstream 8K panels. It supports existing mainstream TVs (Sharp, Sony, Skyworth, Samsung and other 60Hz and 120Hz refresh rate TVs). The player supports video sources to be written via USB3.0 and stored in the SSD solid-state drive in the player. Through a unique high-performance video encoding processor, it interconnects with 8K TVs via HDMI2.0/HDMI2.1/DP1.4 interfaces to output lossless high-definition videos of specifications such as 4K@60Hz, 8K@30Hz, and 8K@60Hz.

Li Xinglong, General Manager of Vision Display Optoelectronics, mentioned: "The flexible programmability of FPGA has greatly helped us to quickly develop new products and new technologies. For example, we have used FPGA to develop various dedicated transmission interfaces for the video field, such as HDMI2.1 and DP1.4 for 8K applications. We use the programmable and fast iteration characteristics of FPGA to provide solutions at the earliest, so that we can launch new products faster than competitors or ASIC solutions."

Of course, in the future, Feng Yi said that Xilinx will work hard to optimize costs in the large-scale use of TCON.