It is an effective way to use a simulator (soft simulation) to verify the algorithm when there is no board. TI's CCS provides three soft simulation methods: CPU Cycle Accurate, Device Functional and Device Cycle Accurate. Their various meanings are as follows. a. If you need only to debug and optimize the program for code size and CPU cycles, then a CPU Cycle Accurate Simulator will give the best possible performance. These simulators model the instruction set of their respective targets. In addition, they model timers and can take external interrupts at the CPU core boundary. This allows BIOS code to run over CPU simulators. They can measure CPU cycles and other CPU core events. This is not the best simulator choice for an application that uses peripherals. It is used to optimize the algorithm. b. If you are debugging an application that uses EDMA, or optimizing an application for better code and data placement, a Device Functional Simulator is the best choice. These simulators allow the DMA, Interrupt Selector, Caches, and McBSP to be programmed and used. However, only the hit/miss statistics of the caches is supported. DMA does not simulate the true cycles of data transfer, but functionally copies the data from source to destination. However, the peripherals maintain a program correctmer view. This can be used for faster device simulation when total device cycles are not of much concern. Select when simulation interrupts, EDMA, cache and other functions are needed. c. If you want to use EDMA and Caches, and are interested in knowing the total device cycles and stall cycles consumed by the application, a Device Cycle Accurate Simulator should be selected. These simulators, besides supporting the programmatic view of all peripherals and caches, also model them in a cycle-accurate manner. However, these simulators are slow because of the vast details they model. Furthermore, not only the functionality but also the impact on the pipeline should be simulated when selecting