[Analysis of the topic of the college electronic competition]——2022 TI Cup Shanghai C topic "Active two-way audio amplifier circuit"

gmchen

[Analysis of the topic of the college electronic competition]——2022 TI Cup Shanghai C topic "Active two-way audio amplifier circuit" [Copy link]

 

2022 TI Cup Shanghai C Topic: Active Two-Way Audio Amplifier Circuit

1. Mission

Design and manufacture an audio amplifier circuit using an active frequency division network to achieve frequency division and power amplification of audio signals.

The figure below is a block diagram of the amplifier circuit structure. The signal source output signal VS _is an audio signal with a frequency range of 100Hz to 20kHz and an amplitude range of 10 to 100mV (effective value). In the figure, A, B, and C are three test endpoints, and S is the signal source interface. The entire homemade device is provided with positive/negative power by a regulated power supply, the load resistor H is an 8Ω/4W power resistor, and the load resistor L is a 4Ω/8W power resistor.

II. Requirements

(1) The input impedance of the preprocessing circuit is greater than 10kW, and the maximum gain is not less than 46dB. The preprocessing circuit is required to have an automatic gain control function. When the amplitude of the input sinusoidal signal VS _changes in the range of 10 to 100mV (effective value), the amplitude of the output signal VC _in the frequency band of 100 Hz to 20kHz changes by less than 1dB, and the signal waveform is not distorted.

(2) Design and manufacture the high-pass filter and power amplifier circuit shown in the figure, and output the signal _{VA through high-pass filtering and power amplification. The -3dB cutoff frequency of the high-pass filter is 2kHz, the stopband attenuation rate is 24dB/octave, and the fluctuation within the 10kHz~20kHz band is 3dB. The power amplifier circuit provides an} undistorted signal of no less than 2W to the load resistor H.

(3) Design and manufacture the low-pass filter and power amplifier circuit shown in the figure, and output the signal VB through low-pass filtering and power amplification _{. The} -3dB cutoff frequency of the low-pass filter is 2KHz, the stop-band attenuation rate is 24dB/octave, and the fluctuation within the 100Hz~1kHz band is 3dB. The power amplifier circuit provides an undistorted signal of no less than 4W to the load resistor L.

The amplitude-frequency characteristics of low-pass and high-pass filters are shown in the figure.

4) The phase difference between signal VA _and signal VB _at 2kHz frequency is ±10°.

(5) Others.

3. Description

(1) Test interfaces must be reserved for ports A, B, C, and S, and their signal parameters can be measured using an oscilloscope.

(2) The -3dB cutoff frequency of the high-pass filter and the low-pass filter is 2kHz, and an error of ±50Hz is allowed.

(3) The purpose of requirement 4 is to detect the phase shift characteristics of the two output signals A and B of the two-way audio amplifier circuit at a frequency of 2kHz.

gmchen

Topic analysis and solution design

This topic involves three circuit modules: pre-processing amplifier, active filter, and low-frequency power amplifier. The overall structure has been given in the topic, and all the contestants have to do is to select the circuit, calculate the component parameters, and install and debug. The following will discuss each of them.

gmchen

1. Preprocessing circuit

The requirements of the topic are: input impedance greater than 10kW, maximum gain not less than 46dB. It has an automatic gain control function. When the input sinusoidal signal amplitude changes in the range of 10 to 100mV (effective value), the output signal amplitude changes within the frequency band of 100 Hz to 20kHz by less than 1dB, and the signal waveform is not distorted.

This is an AGC amplifier. The AGC amplifier can be implemented with a voltage gain amplifier (VGA chip), a general-purpose op amp plus variable resistor devices such as field effect transistors, or all transistors. It is relatively simple to implement with a VGA chip, and it is also easy to control various AGC parameters, so the following is an analysis and design of this circuit.

According to the requirements of the topic, the preamplifier must meet the following requirements:

1. The input variation range given in the question is 10~100mV, so the gain control range of the VGA chip in the pre-amplifier must be greater than 20dB.

2. The maximum gain of the pre-amplifier is not less than 46dB (borne by a single VGA or shared by several amplifiers).

3. The question requires a voltage gain of no less than 46dB (200 times) when the input is 10mV, so the output voltage of this pre-amplifier will be no less than 2Vrms, that is, the peak value is 2.83V, which requires that the output dynamic range of the amplifier must be greater than ±2.83V.

4. The input impedance of the pre-amplifier must be greater than 10kΩ.

5. The frequency response of the pre-amplifier must be greater than 100Hz~20kHz.

Not all VGA chips can meet the above conditions. The following is an example of several chips that I often use to illustrate this problem.

The chip LMH6502 meets the first, fourth and fifth requirements; its maximum gain can be determined by an external resistor, which meets the second requirement; its output dynamic range is greater than ±3.2V under the condition of a power supply voltage of ±5V, which meets the third requirement.

The chip AD603 meets the first, second and fifth requirements. Under the condition of power supply voltage of ±5V, its output dynamic range can reach ±3V, but the distortion is slightly large at this time, and it can only barely meet the third requirement. Its input resistance is only 100Ω, which does not meet the fourth requirement at all.

The chip AD8367 fully meets the first and fifth requirements; its maximum gain is only 42.5dB, which does not meet the second requirement; its maximum output swing is only 4V, which does not meet the third requirement at all; and its input resistance is 200Ω, which does not meet the fourth requirement at all.

Of course, the above judgment is based on the situation that only one VGA chip is used to form the entire pre-amplifier. If multiple chips are used, some shortcomings can be compensated. For example, insufficient total amplification can be compensated by adding op amps, insufficient input impedance can be compensated by inserting a high input impedance buffer in front, and so on.

gmchen

The figure below is an AGC circuit designed by the author based on the VGA chip AD603. This device is used not only because the author has a ready-made chip on hand, but also because it has only 8 pins and the peripheral circuit is relatively simple. In order to make up for its shortcomings, a follower composed of U1 is added to the front end of the circuit to increase the input resistance of the entire circuit. The power supply voltage is increased to ±6V (the maximum power supply voltage allowed by the chip is ±7.5V), so that its output dynamic range is about ±3.5V, which meets the requirements of the topic. The maximum gain of the amplifier can be adjusted by the feedback resistor connected between pins 5 and 7. When this resistor is not connected, the minimum gain is 9dB, the maximum gain is 51dB, and the bandwidth is 9MHz.

The other op amps in the figure are general-purpose op amps, and their power supply voltage is the same as that of AD603. The power supply decoupling capacitor is not drawn in the figure, but in the actual circuit, each op amp and the power supply of AD603 are connected with appropriate decoupling capacitors.

gmchen

The AGC control voltage of this circuit is discussed below.

The output of the amplifier in the circuit above is detected by diode D1, and its average voltage is obtained after filtering by R2 and C2. In principle, this voltage can be fed back to the control end of the VGA circuit to achieve AGC, but in fact, directly feeding this voltage back in this circuit cannot achieve the control index required by the question.

According to the requirements of the question, when the AGC starts to control, the effective value of the amplifier's output voltage is 2V, and the fluctuation cannot exceed 1dB. Based on this calculation, the fluctuation of the effective value of the output voltage after the control should be less than 0.24V, and the average value fluctuation should be less than 0.22V. However, since the output voltage of the amplifier must also subtract the turn-on voltage of the diode, the actual fluctuation of the average output voltage will be smaller.

According to the AD603 data sheet, its gain control voltage is the voltage difference between pin 1 and pin 2. When this voltage difference is -0.5V ~ +0.5V, its gain changes from minimum to maximum, and the control sensitivity is 40dB/V. According to the requirements of the question, the input voltage change after the AGC starts is greater than 20dB, so the control voltage change should be greater than 0.5V, otherwise the requirement of AGC control range greater than 20dB will not be met.

Obviously, the change in the average output voltage cannot meet the requirements of the AGC control voltage change, so an amplifier with sufficient amplification must be connected to amplify the change in the output voltage to meet the requirements of the VGA control voltage. A more ideal approach is to connect an integrator in the feedback loop, so that no matter how much the output voltage changes, the integrator will continue to integrate this change until the final output returns to the original state. From the perspective of control theory, a system without an integrator in the feedback loop is a differential system, and there is always an error between its actual output and the ideal output. The feedback signal is established based on this error, and the larger the feedback gain, the smaller the error. The system with an integrator is a non-difference system, because the error will be continuously accumulated and fed back by the integrator, and the integration will not stop until the error is 0.

In the above circuit, U3 can be regarded as a high-gain amplifier with low-pass characteristics, or as an integrator with a discharge resistor. In fact, its function is between the amplifier and the integrator. The larger the resistance of resistor R4, the closer it is to the integrator. However, this resistor cannot be completely eliminated, because once the output voltage of the VGA drops, since the diode cannot flow reverse current, the absence of this resistor will result in no release channel for the charge on the integration capacitor, so that the output voltage of the integrator will not change in time, resulting in the VGA gain not rising in time, and the AGC will be out of control.

Since the 2nd pin of AD603 is grounded, the control signal level sent to the 1st pin should vary between -0.5V and +0.5V. However, the average voltage obtained from the detection of diode D1 must be a positive level signal greater than 0, and the output after the reverse integrator must be a negative level signal, which does not meet the control voltage requirements of the above circuit. For this reason, a positive level is input to the in-phase input of the integrator through potentiometer R6 in the circuit, so that the output level of the integrator can be shifted upward to the required position, which is actually adjusting the control threshold. In actual debugging, the input signal is set to 10mV (root mean square value), and then R6 is adjusted to make the output 2V (root mean square value), which moves the control voltage to the AGC control level range specified in the question.

The last question is the DC level limit range of the control voltage. According to the AD603 data sheet, when the power supply is ±6V, the DC level limit range of the control voltage is between -1.8V and +2.6V. In order to prevent the control voltage from being too large in some unexpected circumstances (such as during debugging), a bidirectional limiter circuit consisting of R5, D2, and D3 is set in the circuit. Two of the limiter diodes use red light-emitting diodes, which can limit the potential to within ±1.5V (if ordinary silicon diodes are used, the diodes will start to conduct at around ±0.3V, which cannot meet the control voltage requirement of ±0.5V).

gmchen

The author has tested the AGC function of the above circuit. The test frequency is 2kHz, and the test results are: the AGC input voltage range for control is 6mV~600mV (RMS value, the same below), and the specific data is shown in the table below:

Input voltage (rms)	6mV	10mV	100mV	600mV
Output voltage (rms)	2.06V	2.08V	2.16V	2.18V
Gain (dB)	50.7	46.4	26.7	11.2

The above data shows that the gain is 46.4dB when the input voltage is 10mV, which meets the requirements of the question. When the input voltage is in the range of 10mV~100mV, the relative change of the output voltage is 0.11/2=5.5% (0.47dB), which also meets the requirements of the question.

In addition, the maximum gain of this AGC circuit is 50.7dB, which is consistent with the data provided in the AD603 data sheet (51dB). In the entire AGC control range (input 6mV~600mV), the input changes by 40dB and the output changes by 0.5dB. That is, the control range of the AGC (the gain change range of the VGA) is 40dB. This is consistent with the data provided in the AD603 data sheet (42dB), and it also greatly exceeds the requirements of the question.

gmchen

The author also conducted a frequency response test on this circuit, measuring the output voltage at input voltages of 10mV, 100mV, and 600mV (i.e., near the two endpoints and in the middle of the entire start-up range). The test results are as follows:

	100Hz	2kHz	500kHz	2MHz
Input 10mV	2.04V	2.08V	2.10V	2.21V
Input 100mV	2.11V	2.16V	2.16V	2.29V
Input 600mV	2.13V	2.18V	2.17V	2.27V

It can be seen that this circuit has good AGC characteristics in the range of 100Hz~2MHz. The author also tested the low-frequency response below 100Hz. The lowest frequency that can work stably is 50Hz. The output fluctuates below 50Hz. The reason is that at lower frequencies, the pulsating signal after diode rectification can no longer be filtered into a DC signal by the capacitor behind it, and the pulsating component causes the gain of the VGA to fluctuate. Increasing the RC time constant (for example, increasing C2 and C3) can reduce the lowest controllable frequency, but if the time constant is too large, the response speed of the system will become slow, so the author did not further pursue a lower controllable frequency.

gmchen

2. Frequency divider (filter). The requirements of the question are: the -3dB cutoff frequency (crossover point) of the high-pass filter and the low-pass filter are the same, both are 2kHz; the stopband attenuation rate is 24dB/octave; the fluctuation in the range of 10kHz to 20kHz in the high-pass filter passband is 3dB, and the fluctuation in the range of 100Hz to 1kHz in the low-pass filter passband is 3dB; the output phase difference of the two filters at the crossover point is ±10°.

According to the description of the stopband attenuation rate in the title, we can know that these are two 4th-order active filters. Because this type of frequency division circuit is usually always used in audio equipment, in order to ensure the fidelity of the signal, these two filters should have good delay characteristics, so it is not appropriate to use Chebyshev or elliptical filters, but Butterworth filters or Bessel filters with relatively flat passband characteristics should be used. The following analysis is based on the Butterworth filter.

The 4th-order Butterworth filter is composed of two 2nd-order filter sections in series. The cutoff frequencies of the two filter sections are the same, and the Q values are 0.54 and 1.31 respectively. The question requires that the output phase difference of the two filters at the crossover point is ±10°. If the cutoff frequencies and Q values of the two filters are strictly equal to the design values, then after ignoring the influence of other factors, their phase difference at the cutoff frequencies should be equal. However, if there is an error in their cutoff frequencies or the Q values are different from the design values, then there will be a phase difference in the outputs of the two filters at the crossover point.

According to calculations, the phase change caused by a 1% change in the frequency near the cutoff frequency of the 4th-order Butterworth filter is about 2°, so the question requires that the phase difference between the two filters at the crossover point should not exceed 10°, which means that the relative error of their cutoff frequencies should not exceed 5%. The error in the Q value will also cause its phase change, but its influence is much smaller than that of the cutoff frequency and can be basically ignored.

The accuracy of the cutoff frequency of ordinary active filters depends on the accuracy of the resistors and capacitors. The accuracy of resistors is relatively easy to control. Most commercial resistors can now achieve an accuracy of 1%, and even 0.1% resistors are easy to obtain. However, the accuracy of capacitors is more difficult to control. High-precision capacitors are not easy to obtain and are very expensive. Therefore, in order to obtain an accurate and stable cutoff frequency, the resistors and capacitors must be screened when making the filter, and components with accurate resistance and capacitance values and low temperature coefficients must be selected.

gmchen

In order to avoid the above problems, the author used the switched capacitor filter chip MF10 in the experiment. The chip contains two switched capacitor structure 2nd order state variable filters, so a 4th order low pass, high pass or band pass filter can be constructed with one chip. The figure below shows a 4th order Butterworth low pass filter constructed with a switched capacitor filter.

According to the connection method in the figure above, the -3dB cutoff frequency f _c , Q value, and passband gain AV _of this filter can be expressed as

In circuit design, let R1=R2=R4=R, and the above relationship is simplified to f _c =f _CLK /100, Q=R3/R, AV ₌ -1.

Obviously, this filter does not require capacitors whose quality is difficult to control, and its cutoff frequency depends only on the external clock frequency, so it is easy to obtain a filter with a very accurate cutoff frequency. In addition, this filter can easily change the frequency characteristics of the filter by simply changing the clock frequency, so it is very suitable for applications where the cutoff frequency needs to be changed dynamically.

In the actual production, resistors with a precision of 0.1% are selected to ensure the accuracy of the parameters. The two resistors R3A and R3B that determine the Q value of the Butterworth filter are connected in series to obtain the required resistance value.

The output signal of this filter contains switching noise of the clock frequency, so a subsequent analog low-pass filter is added to the above circuit to filter out this noise. Considering that the switching noise is originally small, this filter is designed as a 2nd-order low-pass filter with a -3dB cutoff frequency of about 47kHz and a Q value of about 0.75. If lower switching noise is required, it can also be designed as a high-order filter. One thing to note is that since the load capacity of MF10 is not very strong, the input resistance of this filter cannot be too small (the output dynamic range will be significantly reduced if it is less than 5 kΩ). The input resistance of the circuit in the figure will not be less than the resistance value of R5, 7.5kΩ, and the impact on the output dynamic range of MF10 is basically negligible.

gmchen

The test results of the above circuit are shown in the following table. The test conditions are: input signal amplitude effective value 1V, clock signal frequency 200kHz.

Signal frequency ( Hz )	100	200	500	1k	2k	4k	10k
Output amplitude ( V )	1.06	1.06	1.05	1.03	0.74	0.066	0.005*

*The signal-to-noise ratio is very poor, and the data has large errors

Taking the 100Hz output amplitude of 1.06V as the benchmark, the -3dB amplitude should be 0.749V. The amplitude measured at the preset cutoff frequency of 2kHz is 0.74V, which can be considered to be completely in line with the design. In fact, after careful testing, the accurate -3dB frequency is 1987Hz, and the error from the design value is only 0.65%, which meets the parameter standard of the MF10A chip used by the author.

The author also tested this filter by changing the cutoff frequency. When the clock frequency was changed to 100kHz and 400kHz, the test results were exactly the same as those of the above clock frequency of 200kHz, so I will not list them here.

As long as the output of the first-stage filter connected to R1B in the above low-pass filter circuit is changed from pin 1 to pin 3, and the output of the second-stage filter connected to R5 is changed from pin 20 to pin 18, without changing anything else, this filter becomes a high-pass filter. The author also tested the high-pass filter constructed in this way, and the test conditions are the same as those of the low-pass filter: the input signal amplitude is 1V effective value, and the clock signal frequency is 200kHz. The test results are as follows:

Signal frequency ( Hz )	500	1k	2k	5k	10k	20k	50k
Output amplitude ( V )	0.008*	0.068	0.703	1.00	1.01	0.99	0.73

*The signal-to-noise ratio is very poor, and the data has large errors

It can be seen that the cutoff frequency of this high-pass filter is the expected 2kHz (after careful measurement, it is 2006Hz, with an error of 0.3%). The fluctuation in the passband range of 5kHz~20kHz is only ±1% (about 0.1dB). These indicators fully meet the requirements of the question.

The test results show that the gain drops at 50kHz, which is due to the low-pass filter (cut-off frequency is about 47kHz) connected after the circuit to eliminate switching noise. It can also be seen from here that when using a switched capacitor filter to design a high-pass filter, its passband range is much smaller than that of an analog filter because it needs to filter out switching noise, so this filter is more suitable for low-pass and band-pass applications.

gmchen

3. Low frequency power amplifier .

The requirements of the topic are: the frequency response of the high-frequency amplifier should be no less than 10kHz~20kHz, and provide no less than 2W undistorted signal on an 8Ω load resistor; the frequency response of the low-frequency amplifier should be no less than 100Hz~1kHz. Provide no less than 4W undistorted signal on a 4Ω load resistor.

The output voltage of these two amplifiers is the same, both are 4V effective value, so the peak value of the output voltage is 5.66V. The peak values of the output current are 0.71A and 1.41A respectively. In order to simplify the design and production, they can actually be designed according to unified indicators: the frequency response range is not less than 100Hz~20kHz, the output voltage peak is not less than 6V, and the output current peak is not less than 1.5A.

The above indicators are very low and can be achieved by a variety of circuit structures. The author used the simplest circuit as shown below.

gmchen

This circuit uses a fully complementary composite transistor as the output stage of the power amplifier and uses an operational amplifier to form a deep negative feedback. Due to the intervention of the operational amplifier, debugging is easier and the distortion is lower. The design process of the circuit is as follows:

First, select the final power amplifier tubes Q3 and Q4 according to the indicators. Since the output voltage peak is very low, basically just select the transistor according to the output current. The author selected the readily available complementary high-power transistor pair 2N3055 and MJ2955. The maximum current allowed by this transistor is 15A, which is a bit like overkill. R7 and R8 are the current series negative feedback resistors of the final power amplifier, which can effectively suppress the current runaway caused by the heating of the transistor. In the actual circuit, three 0.5 ohm resistors are connected in parallel.

Q1 and Q2 are the excitation stage, the quiescent current of which is usually in the milliampere range, and the voltage drop of this current across R5 and R6 is the quiescent V _BE of Q3 and Q4 . According to the parameters in the figure, the quiescent current of the excitation stage is about 1~2mA.

The large string of resistors and diodes from R2 to R4 is the bias circuit of the power amplifier. Since the static voltage difference between the base of Q1 and the base of Q2 is roughly the voltage drop of the BE junctions of four transistors, three diodes and a variable resistor R3 are set in the bias circuit. Assuming that these diodes have the same temperature as Q1~Q4, the diodes can provide temperature compensation. Adjusting R3 can adjust the bias voltage applied to each transistor, so it is a bias adjustment resistor.

The design process of the resistance values of R2 and R4 is as follows (taking R2 as an example). When the output reaches the maximum value of +5.66V, the output current of transistor Q3 is 1.41A. Assuming that the hfe of Q3 is 50, its base current is about 30mA at the maximum output, and this current must be provided by Q1. Assuming that the hfe of Q1 is 100, the base current of Q1 must be greater than 0.3mA, and this current must be provided by the power supply through R2.

When the output is 5.66V, the voltage drop on R2 is 12V minus 5.66V minus the V _BE of the two transistors , which is about 5V. At this time, the current flowing through this resistor must be greater than 0.3mA, so its resistance must be less than 16kΩ. In fact, the current flowing through the string of diodes must also be considered, and that current must be at least in the milliampere range (if it is too small, the dynamic internal resistance of the diode will increase, which is not conducive to the transmission of the output signal of the op amp to the transistor), so its resistance value must be much smaller than 16kΩ, and 4.7kΩ is used here.

gmchen

When debugging this circuit, follow the principle of static first and then dynamic.

The first step is to adjust R3 without installing the op amp so that the current of the positive and negative power supplies are both around 10mA, which means that the static operating point has been adjusted. If the static operating point current cannot be adjusted to the above range, you should check whether there are errors in the circuit and whether the components are damaged. In particular, once the current surges, you should quickly cut off the power supply and find the cause, otherwise it is likely to cause the transistor to burn out. If the current can be adjusted, but it is always far beyond the above range, you can appropriately modify the parameters of the bias circuit, such as increasing R3 or reducing a diode.

After the static operating point is normal, the second step can be carried out. Insert the operational amplifier, and then connect the input signal for dynamic testing. The actual test results of the above circuit are as follows (the voltages are all effective values):

1. 1/4 power test

f(Hz)	10	50	100	500	1k	2k	5k	10k	20k	50k	100k	200k
Vi(V)	2.02	2.02	2.02	2.01	2.00	1.99	2.01	2.01	2.01	2.01	1.99	2.00
Vo(V)	2.04	2.04	2.04	2.02	2.00	1.98	1.94	1.93	1.93	1.92	1.92	1.93
G(dB)	0.09	0.09	0.09	0.04	0	-0.04	-0.31	-0.35	-0.35	-0.40	-0.31	-0.31

2. Full power test

f(Hz)	10	50	100	500	1k	2k	5k	10k	20k	50k	100k	200k
Vi(V)	4.02	4.01	4.01	4.00	3.99	3.95	3.95	3.94	3.93	3.92	3.91	3.94
Vo(V)	4.03	4.03	4.02	3.99	3.96	3.87	3.84	3.83	3.84	3.82	3.83	3.87
G(dB)	0.02	0.04	0.02	-0.02	-0.07	-0.18	-0.25	-0.25	-0.20	-0.22	-0.18	-0.16

During all the above tests, there was no observable distortion in the output waveform.

The results show that within the frequency response range of 10Hz~200kHz, this circuit has a very high gain flatness, which is more than enough to meet the requirements of the question.

The only drawback of this circuit is that the power supply voltage is much larger than the maximum output voltage of 5.66V, so the power supply efficiency of this circuit is very low. The measured power consumption of the power supply at full power output (4W) is about 10.8W, which means that its power supply efficiency is only 37%. Theoretically, the efficiency of Class B amplifiers can reach 78%, and it is common for actual amplifiers to reach 60%~70%. For this circuit, to improve the power supply efficiency, the power supply voltage must be reduced. However, after reducing the power supply voltage, the excitation current of the transistor provided by R2 and R4 will not be satisfied. The solution is to use a bootstrap bias circuit: split R2 and R4 into two resistors in series, and then connect a large-capacity capacitor to the output of the amplifier at the middle node of the two resistors, and use the output of the amplifier to provide the excitation current of the transistor. After this modification, the normal working power supply voltage can be reduced to ±7V~±8V. Detailed analysis is omitted, and interested readers can refer to relevant information by themselves.

shuangchafeng

(1) The input impedance of the pre-processing circuit is greater than 10 kW. Can you explain what this means?

gmchen

It is 10 kilo-ohms. The Greek letter Omega has been changed to W for some reason.

davidzhu210

Mr. Chen, I modified your AGC part, using diodes to realize detection and transistors to control the voltage of one foot of AD603. The transistor has a wider frequency band than the op amp. Can you help me comment on it and see if there are any problems? Thank you!

gmchen

davidzhu210 posted on 2022-10-27 22:01 Teacher Chen, I modified your AGC part, using a diode to realize detection and a transistor to control the voltage of one foot of AD603. The transistor has a wider frequency band than the op amp. You...

There is no problem with changing to transistors. The frequency response can be ignored because the AGC voltage is a quasi-DC signal.
The only thing to note is that the voltage of pin 1 of AD603 will reach 6V at the moment of power-on and during the transistor cut-off period. According to the manual, this voltage exceeds the limit.

davidzhu210

gmchen posted on 2022-10-28 12:17 There is no problem with changing to transistors. The frequency response can be ignored because the AGC voltage is a quasi-DC signal. The only thing to pay attention to is the power-on moment and the crystal...

Thanks for the advice, Mr. Chen! According to the manual, the maximum withstand voltage of pins 1 and 2 can reach the power supply voltage. But for the sake of safety, I changed the capacitor C2 to ground. Anyway, as long as the collector of Q1 is AC grounded, it will be fine. During normal operation, Q1 is always in the amplification area and will not enter cutoff or saturation.

gmchen

davidzhu210 posted on 2022-10-28 14:17 Thank you Mr. Chen for your advice! According to the manual, the maximum withstand voltage of pins 1 and 2 can reach the power supply voltage. But for the sake of safety, I changed the capacitor C2 to ground, anyway, it only...

The limit of pins 1 and 2 is indeed the power supply voltage, but that is the limit that will not damage the device.

I have done an experiment before, and it seems that the VGA characteristics will become abnormal after exceeding a certain value. I did not make a detailed record at that time, but I just remembered this impression, so I used LED clamping in my design for safety.

If you happen to be doing this experiment, you can test it out as well.

davidzhu210

gmchen posted on 2022-10-28 15:13 The limit of pins 1 and 2 is indeed the power supply voltage, but that is the limit that will not damage the device. I have done an experiment before, and it seems that exceeding a certain value...

OK, thanks for your suggestion!