How to control trace impedance of PCB for signal integrity?
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Without impedance control, it will cause considerable signal reflection and signal distortion, leading to design failure. Common signals, such as PCI bus, PCI-E bus, USB, Ethernet, DDR memory, LVDS signal, etc., all need impedance control. Impedance control ultimately needs to be implemented through PCB design, and higher requirements are also placed on PCB board technology. After communicating with the PCB factory and combining the use of EDA software, the impedance of the routing is controlled according to the signal integrity requirements. Different routing methods can all obtain the corresponding impedance values through calculation. Microstrip line It consists of a strip conductor and a ground plane with a dielectric in the middle. If the dielectric constant of the dielectric, the width of the line, and its distance from the ground plane are controllable, its characteristic impedance is also controllable, and its accuracy will be within ±5%. Stripline Stripline is a copper strip placed in the middle of a dielectric between two conductive planes. If the thickness and width of the line, the dielectric constant of the medium, and the distance between the two ground planes are all controllable, then the characteristic impedance of the line can also be controlled with an accuracy within 10%. Structure of multilayer board: In order to control the impedance of PCB well, we must first understand the structure of PCB: Usually what we call multilayer board is made of core board and prepreg laminated on each other. Core board is a hard board with specific thickness and copper clad on both sides. It is the basic material of printed circuit board. The semi-cured sheet constitutes the so-called wetting layer, which plays the role of bonding the core board. Although it also has a certain initial thickness, its thickness will change during the pressing process. Usually, the two outermost dielectric layers of the multilayer board are wetting layers, and a separate copper foil layer is used outside these two layers as the outer copper foil. The original thickness specifications of the outer copper foil and the inner copper foil are generally 0.5OZ, 1OZ, and 2OZ (1OZ is about 35um or 1.4mil), but after a series of surface treatments, the final thickness of the outer copper foil will generally increase by nearly 1OZ. The inner copper foil is the copper cladding on both sides of the core board. Its final thickness is very close to the original thickness, but due to etching, it will generally be reduced by several um. The outermost layer of a multilayer board is the solder mask, which is what we often call "green oil". Of course, it can also be yellow or other colors. The thickness of the solder mask is generally not easy to accurately determine. The area without copper foil on the surface is slightly thicker than the area with copper foil. However, because of the lack of copper foil thickness, the copper foil still appears more prominent, and we can feel it when we touch the surface of the printed board with our fingers. When making a printed board of a certain thickness, on the one hand, it is required to reasonably select the parameters of various materials, and on the other hand, the final thickness of the prepreg will also be smaller than the initial thickness. Below is a typical 6-layer stackup structure: PCB parameters: The PCB parameters of different printed circuit board factories will be slightly different. Through communication with the technical support of the circuit board factory, some parameter data of the factory can be obtained: Surface copper foil: There are three thicknesses of surface copper foil materials that can be used: 12um, 18um and 35um. The final thickness after processing is approximately 44um, 50um and 67um. Core board: The board we commonly use is S1141A, standard FR-4, copper clad on both sides. The optional specifications can be determined by contacting the manufacturer. Prepreg: Specifications (original thickness) are 7628 (0.185mm), 2116 (0.105mm), 1080 (0.075mm), 3313 (0.095mm), the actual thickness after pressing is usually about 10-15um smaller than the original value. Up to 3 prepregs can be used for the same wetting layer, and the thickness of the 3 prepregs cannot be the same. At least one prepreg can be used, but some manufacturers require at least two. If the thickness of the prepreg is not enough, the copper foil on both sides of the core board can be etched off, and then the two sides are bonded with prepregs, so that a thicker wetting layer can be achieved. Solder mask: The solder mask thickness C2 on the copper foil is 8-10um. The solder mask thickness C1 in the surface without copper foil area varies according to the surface copper thickness. When the surface copper thickness is 45um, C1≈13-15um. When the surface copper thickness is 70um, C1≈17-18um. Wire cross section: We would think that the cross section of the wire is a rectangle, but it is actually a trapezoid. Taking the TOP layer as an example, when the copper foil thickness is 1OZ, the upper bottom side of the trapezoid is 1MIL shorter than the lower bottom side. For example, if the line width is 5MIL, then its upper bottom side is about 4MIL and the lower bottom side is 5MIL. The difference between the upper and lower bottom sides is related to the copper thickness. The following table shows the relationship between the upper and lower bottoms of the trapezoid under different conditions. Dielectric constant: The dielectric constant of the prepreg is related to its thickness. The following table shows the thickness and dielectric constant parameters of prepreg of different models: The dielectric constant of the board is related to the resin material used. The dielectric constant of FR4 board is 4.2-4.7, and will decrease with the increase of frequency. Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 095mm), the actual thickness after pressing is usually about 10-15um smaller than the original value. Up to 3 prepregs can be used for the same wetting layer, and the thickness of the 3 prepregs cannot be the same. At least one prepreg can be used, but some manufacturers require at least two. If the thickness of the prepreg is not enough, the copper foil on both sides of the core board can be etched off, and then the two sides are bonded with prepregs, so that a thicker wetting layer can be achieved. Solder mask: The solder mask thickness C2 on the copper foil is 8-10um. The solder mask thickness C1 in the surface without copper foil area varies according to the surface copper thickness. When the surface copper thickness is 45um, C1≈13-15um. When the surface copper thickness is 70um, C1≈17-18um. Wire cross section: We would think that the cross section of the wire is a rectangle, but it is actually a trapezoid. Taking the TOP layer as an example, when the copper foil thickness is 1OZ, the upper bottom side of the trapezoid is 1MIL shorter than the lower bottom side. For example, if the line width is 5MIL, then its upper bottom side is about 4MIL and the lower bottom side is 5MIL. The difference between the upper and lower bottom sides is related to the copper thickness. The following table shows the relationship between the upper and lower bottoms of the trapezoid under different conditions. Dielectric constant: The dielectric constant of the prepreg is related to its thickness. The following table shows the thickness and dielectric constant parameters of prepreg of different models: The dielectric constant of the board is related to the resin material used. The dielectric constant of FR4 board is 4.2-4.7, and will decrease with the increase of frequency. Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways to be parallel: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 095mm), the actual thickness after pressing is usually about 10-15um smaller than the original value. Up to 3 prepregs can be used for the same wetting layer, and the thickness of the 3 prepregs cannot be the same. At least one prepreg can be used, but some manufacturers require at least two. If the thickness of the prepreg is not enough, the copper foil on both sides of the core board can be etched off, and then the two sides are bonded with prepregs, so that a thicker wetting layer can be achieved. Solder mask: The solder mask thickness C2 on the copper foil is 8-10um. The solder mask thickness C1 in the surface without copper foil area varies according to the surface copper thickness. When the surface copper thickness is 45um, C1≈13-15um. When the surface copper thickness is 70um, C1≈17-18um. Wire cross section: We would think that the cross section of the wire is a rectangle, but it is actually a trapezoid. Taking the TOP layer as an example, when the copper foil thickness is 1OZ, the upper bottom side of the trapezoid is 1MIL shorter than the lower bottom side. For example, if the line width is 5MIL, then its upper bottom side is about 4MIL and the lower bottom side is 5MIL. The difference between the upper and lower bottom sides is related to the copper thickness. The following table shows the relationship between the upper and lower bottoms of the trapezoid under different conditions. Dielectric constant: The dielectric constant of the prepreg is related to its thickness. The following table shows the thickness and dielectric constant parameters of prepreg of different models: The dielectric constant of the board is related to the resin material used. The dielectric constant of FR4 board is 4.2-4.7, and will decrease with the increase of frequency. Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. Solder mask: The solder mask thickness C2 on the copper foil is 8-10um. The solder mask thickness C1 in the area without copper foil on the surface varies according to the surface copper thickness. When the surface copper thickness is 45um, C1 is 13-15um. When the surface copper thickness is 70um, C1 is 17-18um. Wire cross section: We would think that the cross section of the wire is a rectangle, but it is actually a trapezoid. Taking the TOP layer as an example, when the copper foil thickness is 1OZ, the upper bottom side of the trapezoid is 1MIL shorter than the lower bottom side. For example, if the line width is 5MIL, then its upper bottom side is about 4MIL and the lower bottom side is 5MIL. The difference between the upper and lower bottom sides is related to the copper thickness. The following table shows the relationship between the upper and lower bottoms of the trapezoid under different conditions. Dielectric constant: The dielectric constant of the prepreg is related to its thickness. The following table shows the thickness and dielectric constant parameters of prepreg of different models: The dielectric constant of the board is related to the resin material used. The dielectric constant of FR4 board is 4.2-4.7, and will decrease with the increase of frequency. Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. Solder mask: The solder mask thickness C2 on the copper foil is 8-10um. The solder mask thickness C1 in the area without copper foil on the surface varies according to the surface copper thickness. When the surface copper thickness is 45um, C1 is 13-15um. When the surface copper thickness is 70um, C1 is 17-18um. Wire cross section: We would think that the cross section of the wire is a rectangle, but it is actually a trapezoid. Taking the TOP layer as an example, when the copper foil thickness is 1OZ, the upper bottom side of the trapezoid is 1MIL shorter than the lower bottom side. For example, if the line width is 5MIL, then its upper bottom side is about 4MIL and the lower bottom side is 5MIL. The difference between the upper and lower bottom sides is related to the copper thickness. The following table shows the relationship between the upper and lower bottoms of the trapezoid under different conditions. Dielectric constant: The dielectric constant of the prepreg is related to its thickness. The following table shows the thickness and dielectric constant parameters of prepreg of different models: The dielectric constant of the board is related to the resin material used. The dielectric constant of FR4 board is 4.2-4.7, and will decrease with the increase of frequency. Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 73)]Wire cross section: We would think that the cross section of the wire is a rectangle, but it is actually a trapezoid. Taking the TOP layer as an example, when the copper foil thickness is 1OZ, the upper bottom side of the trapezoid is 1MIL shorter than the lower bottom side. For example, if the line width is 5MIL, then its upper bottom side is about 4MIL and the lower bottom side is 5MIL. The difference between the upper and lower bottom sides is related to the copper thickness. The following table shows the relationship between the upper and lower bottom sides of the trapezoid under different conditions. Dielectric constant: The dielectric constant of the prepreg is related to its thickness. The following table shows the thickness and dielectric constant parameters of prepreg of different models: The dielectric constant of the board is related to the resin material used. The dielectric constant of FR4 board is 4.2-4.7, and will decrease with the increase of frequency. Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 73)]Wire cross section: We would think that the cross section of the wire is a rectangle, but it is actually a trapezoid. Taking the TOP layer as an example, when the copper foil thickness is 1OZ, the upper bottom side of the trapezoid is 1MIL shorter than the lower bottom side. For example, if the line width is 5MIL, then its upper bottom side is about 4MIL and the lower bottom side is 5MIL. The difference between the upper and lower bottom sides is related to the copper thickness. The following table shows the relationship between the upper and lower bottom sides of the trapezoid under different conditions. Dielectric constant: The dielectric constant of the prepreg is related to its thickness. The following table shows the thickness and dielectric constant parameters of prepreg of different models: The dielectric constant of the board is related to the resin material used. The dielectric constant of FR4 board is 4.2-4.7, and will decrease with the increase of frequency. Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 73, 73)]Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing for processing can be ensured: 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 73, 73)]Dielectric loss factor: The energy consumed by dielectric materials due to heat under the action of alternating electric field is called dielectric loss, usually expressed as dielectric loss factor tanδ. The typical value of S1141A is 0.015. The minimum line width and line spacing that can be processed is 4mil/4mil. Impulse calculation tool introduction: After we understand the structure of the multilayer board and master the required parameters, we can calculate the impedance through EDA software. You can use Allegro to calculate, but here I recommend another tool Polar SI9000, which is a good tool for calculating characteristic impedance. Many printed circuit board factories are using this software. Whether it is a differential line or a single-ended line, when calculating the characteristic impedance of the inner layer signal, you will find that the calculation result of Polar SI9000 is only slightly different from that of Allegro, which is related to the processing of some details, such as the shape of the wire cross section. But if you are calculating the characteristic impedance of the surface signal, I suggest you choose the Coated model instead of the Surface model, because this type of model takes into account the existence of the solder mask, so the result will be more accurate. The following figure is a partial screenshot of the surface differential line impedance calculated by Polar SI9000 taking into account the solder mask layer:
Since the thickness of the solder mask layer is difficult to control, you can also use an approximate method based on the advice of the board manufacturer: subtract a specific value from the result calculated by the Surface model. It is recommended to subtract 8 ohms from the differential impedance and 2 ohms from the single-ended impedance. PCB requirements for differential pair routing (1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting the parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Route parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on the upper and lower layers (over-under). Generally, try to avoid using the latter, that is, inter-layer differential signals, because in the actual processing of PCB boards, the lamination alignment accuracy between the stacked layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot guarantee that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pairs to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 73)](1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Run parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on two layers above and below (over-under). Generally, try to avoid using the latter, that is, the inter-layer differential signal, because in the actual processing of PCB boards, the lamination alignment accuracy between layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot ensure that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pair to change. Therefore, it is recommended to use the differential within the same layer as much as possible. 73)](1) Determine the routing mode, parameters and impedance calculation. Differential pair routing is divided into two types: outer microstrip differential mode and inner stripline differential mode. By setting parameters reasonably, the impedance can be calculated using relevant impedance calculation software (such as POLAR-SI9000) or using the impedance calculation formula. (2) Run parallel equidistant lines. Determine the line width and spacing. When routing, strictly follow the calculated line width and spacing. The spacing between the two lines should remain unchanged, that is, they should remain parallel. There are two ways of parallelism: one is that the two lines run on the same line layer (side-by-side), and the other is that the two lines run on two layers above and below (over-under). Generally, try to avoid using the latter, that is, the inter-layer differential signal, because in the actual processing of PCB boards, the lamination alignment accuracy between layers is much lower than the etching accuracy of the same layer, and the dielectric loss during the lamination process cannot ensure that the spacing of the differential lines is equal to the thickness of the inter-layer dielectric, which will cause the differential impedance of the inter-layer differential pair to change. Therefore, it is recommended to use the differential within the same layer as much as possible.
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