Yuntian Semiconductor signs contract for 3D wafer-level packaging test project

On April 7, a signing ceremony was held at the Xiamen University Centennial Anniversary Global Alumni Investment Conference, where 32 Xiamen University alumni investment projects were signed on the spot, with a total planned investment of 43.9 billion yuan.

This includes the Yuntian Phase II - Yuntian Semiconductor 3D wafer-level packaging testing project.

According to news from Xiamen Investment, the project is starting the planning and construction of the Yuntian Phase II, which will be located in the Haicang Semiconductor Industrial Base. It is planned to be used to expand the wafer-level packaging production line. After completion and commissioning, the company will have a full range of wafer-level packaging capabilities from 4 inches, 6 inches to 8 inches and 12 inches.

It is reported that Yuntian Semiconductor was established in July 2018. The company is committed to 5G RF device packaging and integration technology. Its main business includes filter wafer-level 3D packaging, high-frequency millimeter-wave chip integration, RF module integration, IPD passive device design and manufacturing, and Bumping/WLCSP/TGV technology, providing customers with full-process R&D solutions and services from product collaborative design, process R&D to mass production. Its first phase factory is located in Haicang District, Xiamen, with a construction area of ​​4,500 square meters, with a 4-inch and 6-inch WLP production capacity of 8,000 pieces/month, and has now been put into mass production.