New, high-density and ultra-power-efficient Xeon processors for cloud services
Lisa Spelman
Vice President and General Manager of Intel Xeon Processor and Storage Group
As Pat Gelsinger and Sandra Rivera shared at the 2022 Investor Conference, Intel is now embarking on a new path to further enhance our data center leadership across all workloads while providing customers with ultra-high energy-efficient computing and driving the development of the data center industry. Thanks to leading products, only Intel can provide customers with leading performance per watt and per core through a unified Xeon platform. At the same time, it is this unparalleled product portfolio and features, as well as our grassroots software ecosystem, that provide strong development momentum for most data centers in the world today.
Intel has developed a new architecture strategy for future generations of Xeon processors, a new dual-track product roadmap based on both performance cores (P-core) and energy efficiency cores (E-core) to integrate the two optimized platforms into a common, industry-defining platform. This new path will maximize the performance per watt and segmented functions of the product, thereby comprehensively improving Intel's overall competitiveness in the industry. The first generation of products under this strategy is a new Xeon processor based on energy efficiency cores (E-core) code-named Sierra Forest, which is developed in parallel with our existing next-generation Xeon processor Granite Rapids based on performance cores (P-core).
To create a high-performance and energy-efficient future for our data center customers, we have adopted the following strategies.
First, over the past two years, we have worked closely with customers to evaluate and upgrade our products from both hardware and software perspectives. Based on multiple tests and performance predictions run in different architectures, we will be able to provide leading performance on key design points of the Xeon platform.
At the same time, we have also noticed that customers have taken a variety of measures in infrastructure optimization. Some of them are optimizing for workloads that benefit from high performance per core and low latency, such as databases, AI, and HPC. Other customers are focusing on maximizing performance per watt to support an increasing number of intensive, latency-insensitive workloads that are mostly concurrent, such as front-end web services and data analysis.
In summary, it is clear why the new Xeon Energy Efficient Core processor line is important to Intel, its customers, and the industry as a whole. The Energy Efficient Cores are designed to provide high energy efficiency and high-density throughput to support cloud native deployments. Based on this, by filling multiple Energy Efficient Cores into the space that would normally be required for a single Performance Core, we can provide higher density at the socket and rack level.
Although we have introduced a new core architecture for the Xeon platform product line, we have also ensured its compatibility with the existing broad Xeon platform ecosystem. The next generation of Xeon processors will not only share the platform, software and BIOS, but in the CPU, we have also decoupled its core and non-core functions into "computing units" and "I/O units". Among them, the I/O unit is common in performance core and energy efficiency core products, which will also enable the entire I/O subsystem design to be reused.
This reduces complexity for both Intel and our customers who are building and validating systems. In addition, the interconnects used between the cores and the memory controllers are the same, and the beauty of these designs is that by simply swapping out compute units, our customers can get the benefits of the entire portfolio from a single platform product.
Sierra Forest and the upcoming Xeon energy-efficient core product roadmap are exciting innovations for Intel and the industry. Combined with other future Xeon products, Intel will greatly empower our customers through product, platform and packaging technology advantages, and jointly draw the blueprint for future cloud architectures.
This Intel platform product based on Intel 3 process technology will be launched in 2024, further helping future data centers focus more on workloads and sustainable development.
Stay tuned for more on this exciting new product line.
Lisa Spelman is Vice President and General Manager of the Xeon Processor and Storage Group at Intel Corporation.
Forward-Looking Statements
Statements in this document regarding future plans and expectations are forward-looking statements. Statements that refer to or are based on estimates, forecasts, projections, uncertain events or assumptions, including statements regarding future products and technologies and the expected availability and benefits of such products and technologies, market opportunities and expected trends in our business or related markets, are also forward-looking statements. Such statements are based on management’s current expectations and involve a number of risks and uncertainties that could cause actual results to differ materially from those expressed or implied by such forward-looking statements. Important factors that could cause results to differ materially are included in our most recent earnings press release and Intel’s filings with the Securities and Exchange Commission at www.intc.com. Intel does not undertake, and expressly disclaims, any obligation to update any statements contained herein, except as required by law.
Previous article:How to choose the right MPU for your HMI application
Next article:AlphaICs begins to provide samples of Gluon, a deep learning coprocessor
- Popular Resources
- Popular amplifiers
- Red Hat announces definitive agreement to acquire Neural Magic
- 5G network speed is faster than 4G, but the perception is poor! Wu Hequan: 6G standard formulation should focus on user needs
- SEMI report: Global silicon wafer shipments increased by 6% in the third quarter of 2024
- OpenAI calls for a "North American Artificial Intelligence Alliance" to compete with China
- OpenAI is rumored to be launching a new intelligent body that can automatically perform tasks for users
- Arm: Focusing on efficient computing platforms, we work together to build a sustainable future
- AMD to cut 4% of its workforce to gain a stronger position in artificial intelligence chips
- NEC receives new supercomputer orders: Intel CPU + AMD accelerator + Nvidia switch
- RW61X: Wi-Fi 6 tri-band device in a secure i.MX RT MCU
Professor at Beihang University, dedicated to promoting microcontrollers and embedded systems for over 20 years.
- LED chemical incompatibility test to see which chemicals LEDs can be used with
- Application of ARM9 hardware coprocessor on WinCE embedded motherboard
- What are the key points for selecting rotor flowmeter?
- LM317 high power charger circuit
- A brief analysis of Embest's application and development of embedded medical devices
- Single-phase RC protection circuit
- stm32 PVD programmable voltage monitor
- Introduction and measurement of edge trigger and level trigger of 51 single chip microcomputer
- Improved design of Linux system software shell protection technology
- What to do if the ABB robot protection device stops
- CGD and Qorvo to jointly revolutionize motor control solutions
- CGD and Qorvo to jointly revolutionize motor control solutions
- Keysight Technologies FieldFox handheld analyzer with VDI spread spectrum module to achieve millimeter wave analysis function
- Infineon's PASCO2V15 XENSIV PAS CO2 5V Sensor Now Available at Mouser for Accurate CO2 Level Measurement
- Advanced gameplay, Harting takes your PCB board connection to a new level!
- Advanced gameplay, Harting takes your PCB board connection to a new level!
- A new chapter in Great Wall Motors R&D: solid-state battery technology leads the future
- Naxin Micro provides full-scenario GaN driver IC solutions
- Interpreting Huawei’s new solid-state battery patent, will it challenge CATL in 2030?
- Are pure electric/plug-in hybrid vehicles going crazy? A Chinese company has launched the world's first -40℃ dischargeable hybrid battery that is not afraid of cold
- How to effectively program a microcontroller active buzzer driver
- MSP430 SPI reads AFE4400 register value code
- WPG Live Broadcast Registration | Thundercomm, Lianda, Qualcomm IOT Platform Solutions and Success Stories
- The rain is a surprise in spring, the valley is clear, the summer is full of grains, and the summer heat is connected
- Microchip Live FAQ|ADAS Platform Root of Trust
- Scaling of DSP data
- Programming example: CPU card 4-byte random number reading
- sampling
- 【Goodbye 2021, Hello 2022】+ Review of my 2021
- How to determine the values of inductance and capacitance in LC filter circuit?