Design of a simple spectrum analyzer based on FPGA

1 Introduction

At present, due to the high price of spectrum analyzers, only a few laboratories in colleges and universities are equipped with spectrum analyzers. However, in electronic information teaching, if there is no spectrum analyzer to assist observation, students can only abstractly understand signal characteristics from books, which seriously affects the teaching experiment effect.

In view of this situation, a simple spectrum analyzer design based on FPGA is proposed. Its advantages are low cost and performance indicators that meet the detection signal range required by teaching experiments.

2 Design

Figure 1 is the overall block diagram of the system design. The system uses C8051F121 in the C8051 series microcontroller as the controller and CvcloneⅢ series EP3C40F484C8 FPGA as the digital signal algorithm processing unit. The system design follows the sampling theorem, intercepts a signal of appropriate length in the time domain, samples and quantizes the signal, obtains the signal spectrum according to specific steps, and displays the signal spectrum on the LCD, while providing a friendly human-computer conversation function. The system has a minimum resolution of 1 Hz and can analyze various signals with a bandwidth of 0~5 MHz.

Since the single-chip C8051 F121 has an integrated A/D converter , it can effectively measure the automatic gain control AGC pressure difference and calculate the amplification factor of the input signal; in addition, the single-chip has a built-in high-speed control core and abundant memory, enabling it to control the entire system; the EP3C40F484C8 FPGA has abundant built-in memory resources to ensure that the system has enough space to store the collected points and complete discrete Fourier transform, digital filter, digital mixing and other signal processing.

3 Theoretical Analysis

3.1 Digital Down-Conversion FFT

With the development of high-speed A/D conversion and DSP technology, the fast Fourier transform (FFT) technology of digital down-conversion can effectively reduce the memory shortage of traditional FFT technology. In high-intermediate frequency and high sampling rate systems, high resolution of signal spectrum, low storage and low computational complexity are achieved, thus greatly improving the real-time performance of the system.

FIG. 2 is a block diagram showing the implementation principle of FFT technology based on digital down-conversion.

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3.2 Direct Digital Synthesizer DDS Principle

The signal source of the frequency sweep signal realized by the direct digital synthesizer (DDS) principle is mainly composed of a reference frequency source, a phase accumulator, a sine wave sampling point storage RAM, a digital-to-analog converter and a low-pass filter. Assume that the reference frequency source frequency is fclk, the counting capacity is a phase accumulator of 2N (N is the number of bits of the phase accumulator), if the frequency control word is M, then the frequency of the DDS system output signal is fout=fclk/2N×M, and the frequency resolution is △f=fclk/2N. In order to achieve the requirement of an output frequency range of 5 MHz, considering the limitation of the actual low-pass filter performance, fclk is 200 MHz and the number of bits of the phase accumulator is 32 bits. The upper 10 bits are used as the ROM address read wave table (1 sine wave cycle samples 1 024 points), and the frequency control word is also 32 bits, so that the theoretical output frequency meets the requirements.

4 System Hardware Design

4.1 AGC Circuit

The input signal is sampled by high-speed A/D, and the signal amplitude must meet the sampling range of A/D, which is 2-3V at most. Therefore, the system design should add AGC circuit. AGC circuit uses AD603 linear gain amplifier . Figure 3 shows the AGC circuit.

4.2 A/D conversion circuit

ADS2806 is a 12-bit A/D converter with the following features: SFDR of 73 dB; SNR of 66 dB; internal and external reference clocks; sampling rate of 32 MS/s. Figure 4 shows the circuit of ADS2806. To make the A/D conversion more stable, a filter capacitor is added to the power supply pin of the A/D converter to suppress power supply noise. The circuit has a simple structure. Driven by the clock CLK, the data port outputs data in real time for FPGA to read.

4.3 FPGA and peripheral interface modules

The Cyclone III series EP3C40F484 FPGA is selected. The device has 39,600 LE resources, 1,134,000 bits of memory, 126 multipliers and 4 PLL phase-locked loops. Since the device has a large number of resources, it can meet the needs of digital mixing, digital filtering, and FFT operations. When the FP-GA works normally, the main external interfaces required are: clock circuit, JTAG download circuit, configuration device and download circuit. Figure 5 shows the peripheral interface circuit of the FPGA.

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5 System Software Design

The system software design includes two parts: the MCU and the FPGA. The MCU is the core control unit of the whole system, which is mainly responsible for system initialization, keyboard input control, LCD display and other functions; while the high-speed parallel computing performance of the FPGA makes it very suitable for signal processing operations with high real-time requirements. The system software flow is shown in Figure 6.

After the system is powered on, the MCU initializes each module of the system, writes the default CIC and FIR filter parameters, and writes the default digital mixer frequency value. After the initialization is completed, the system starts to analyze the spectrum with the default center frequency and resolution, and enters the state of waiting for keyboard input. When the user re-enters the center frequency and resolution parameters through the keyboard, the MCU refreshes the LCD. At the same time, the keyboard can be used to operate the screen on the LCD, move the cursor, and use the software to calculate the frequency value corresponding to the cursor and display it on the LCD. The entire image can also be zoomed in and out to facilitate the observation of the spectrum.

6 Analysis of measurement results

First, Matlab software is used to simulate and test the 20 Hz sine wave and square wave respectively. The system simulation results are shown in Figure 7. As shown in Figure 7a, the spectrum of the 20 Hz sine wave is a spectrum line with only a few leakage frequency components around it, which is in line with the ideal situation. Figure 7b is the analysis result of the 20 Hz square wave. The amplitudes of the fundamental wave, the third, fifth, and seventh harmonics meet the theoretical results of 1, 1/3, 1/5, 1/7, and 1,9.

7 Conclusion

The system can conveniently display the spectrum structure diagram of the signal on the LCD. The operation is simple and convenient for students to operate, which helps students to more intuitively understand the signal spectrum structure in the experimental teaching class, thereby promoting the experimental teaching.