Research on flow detection method of hydraulic system based on time difference method

Publisher:CelestialGardenLatest update time:2010-03-09 Source: 电子设计工程 Reading articles on mobile phones Scan QR code
Read articles on your mobile phone anytime, anywhere

1 Introduction

Hydraulic technology is widely used in mining machinery, such as mining rock drilling, shoveling, transportation, crushing and mineral processing equipment. However, since most mining machinery works in a harsh environment, it is easy to cause hydraulic system failures. In addition, the hydraulic system is closed and most failures occur internally. The fault location is relatively hidden and the cause is complex. Therefore, it is difficult to find the fault, which poses a hidden danger to the maintenance of mining machinery and the safety of underground workers. Flow rate is one of the important parameters of the hydraulic system, and its size directly reflects the operating status of the hydraulic system. By measuring the system flow rate, real-time monitoring of the hydraulic system is achieved to ensure the normal operation of the hydraulic system and the safety of underground workers, and it is also convenient for diagnosing hydraulic system failures. Therefore, it is of great significance to detect the flow rate of the hydraulic system of mining machinery.

2 Principle of measuring hydraulic flow by time difference method

The measurement principle of the time difference method is that the propagation speed of ultrasound in the fluid is related to the flow speed of the fluid, and the flow rate can be measured accordingly. Ultrasonic transducers 1 and 2 are placed upstream and downstream of the flowing medium with a flow speed v, respectively, as shown in Figure 1.

The distance between transducer 1 and transducer 2 is L, the pipe diameter is D, and the angle between L and v is θ. When transducer 2 receives the ultrasonic pulse sent by transducer 1, the propagation speed of the ultrasound along L is (cv), where c is the ultrasonic speed in a stationary medium. The time it takes for the ultrasonic backflow to be transmitted from transducer 1 to transducer 2 is:

The time for the receiving and transmitting functions of the transducers to be swapped, when transducer 2 sends an ultrasonic pulse and transducer 1 receives the ultrasonic wave, and then the ultrasonic wave is transmitted from transducer 2 to transducer 1, is:

Therefore, the time difference between upstream and downstream is:

Because the propagation speed of ultrasound in liquid is 1500m/s, and when the fluid velocity is not very high, it can be considered that: Then equation (3) is simplified to:

In this way, the average liquid flow velocity v can be determined by the acoustic time difference △t, that is, under the premise that c and x are constant, v is linear with △t. Then the flow rate Q is calculated according to the flow equation:

Where k is the velocity distribution correction coefficient.

3 Hardware System Design

The hardware system design of the detection system is mainly composed of ultrasonic transducer, CPLD function, drive transmission, receiving amplification and zero-crossing comparison modules. When the system is working, the microcontroller first sends instructions to the CPLD, and the internal PULSE function module of the CPLD generates a 600 ns drive pulse, and the CNT function module starts timing: the drive pulse enters the drive transmission circuit to make the ultrasonic transducer 1 generate an ultrasonic signal; the ultrasonic wave is received by the ultrasonic transducer 2 through the medium, and the received signal is relatively weak, and it needs to be amplified by the three-stage receiving amplifier circuit composed of LF357 and LM318; the amplified signal is then passed through the zero-crossing comparison circuit composed of MAX903, thereby providing a high-level signal to stop timing for the CNT function module in the CLPD. The timed data in the CNT is converted into time, and then sent by transducer 2 and received by transducer 1. Similarly, another set of time data is recorded by CNT, and the acoustic time difference △t of the upstream and downstream is obtained by subtracting the two, so as to calculate the flow rate and flow of the system. The key to this detection system is to obtain accurate drive pulses and precise upstream and downstream time. Therefore, Aher's CPLD MAXⅡ series EMP240T100C5N is selected, and it is equipped with a 100 MHz crystal oscillator. The CPLD functional module is the core of the system hardware design.

3.1 CPLD Functional Module

The CPLD functional module is mainly composed of 6 submodules, as shown in Figure 2. They are all written in VHDL language, and their respective functions are: DECODER submodule is to transmit the instructions of the microcontroller to each submodule inside the CPLD after decoding; CNT submodule is responsible for timing; PULSE submodule generates driving pulses: CNT_SP submodule generates CNT stop timing signal; SEL_2 is used to select the first 8 bits and the last 8 bits of the 16-bit data in CNT; TRIBUFFER can transmit the 8-bit data selected by SEL_2 to the microcontroller.

The working process is as follows: CPLD works through the P2 port of the single-chip microcomputer. The PULSE submodule sends a specific pulse signal to drive the ultrasonic transducer. The CNT submodule starts timing while the CPLD transmits the pulse. The receiving amplifier circuit receives the signal and after zero comparison, it provides a high-level signal to stop timing to the PULSE_ACT port of the CPLD. Then the CPLD transmits the 16-bit data of the timing in CNT in the form of 8 bits through SEL_2 and TRIBUFFER and then uploads it to the single-chip microcomputer through the P0 port. The single-chip microcomputer realizes data processing and finally uploads or directly displays the data.

3.2 Functional Simulation of Key Submodules in CPLD

Since the detection system requires accurate driving pulses and precise forward and reverse flow time, the PULSE and CNT sub-modules become the key modules of the design. The design of these two modules directly affects the performance of the entire system, functional simulation and the feasibility of verification design.

3.2.1 PULSE submodule simulation

According to spectrum analysis, there is an optimal relationship between the drive pulse width and the sensor frequency. When the pulse width satisfies this relationship, the receiving signal quality of the receiving sensor is optimal. Since the design uses a 2.5 MHz ultrasonic transducer, the optimal drive pulse is calculated to be 600 ns. Since the CPLD control signal can achieve nanosecond control accuracy. Therefore, a control signal can be generated, which not only overcomes the shortcomings of poor anti-interference of analog devices, but also solves the problem of poor signal accuracy of single-chip microcomputers. The CPLD generates a control signal and then enters the drive circuit through optoelectronic isolation. Thus, the 150 V high-voltage drive ultrasonic transmitting sensor is controlled. The drive signal adopts a single pulse drive, as shown in Figure 3. The EMP240T100C5N uses a 100 MHz clock crystal oscillator to send a 600 ns drive pulse signal.

3.2.2 CNT submodule simulation

The key technology of the ultrasonic flow measurement system is the accurate timing of the ultrasonic wave in both downstream and upstream conditions. The more accurate the timing, the more accurate the time difference, which is conducive to the subsequent calculation of flow velocity and flow. Since the frequency of the ultrasonic wave is 2.5 MHz, the working frequency of the timer needs to be adapted to it. The CPLD designed in this system uses a 100 MHz active crystal oscillator with a clock period of 10 ns. The timing principle is: when the CPLD starts to count from the beginning of sending the pulse signal, it stops counting when the pulse signal is received. Through conversion, the value counted by the CPLD is converted into the time taken by the ultrasonic wave in the liquid, thereby realizing the timing function, as shown in Figure 4.

4 Conclusion

Through the functional simulation of the key subsystem, it can be seen that the design of the CPLD key subsystem meets the performance requirements of the overall design. In practical applications, CPLD can also meet its design requirements. The ultrasonic hydraulic flow detection system has the functions of high accuracy, fast response, and strong anti-interference ability. It is suitable for harsh environments and is also convenient for diagnosing hydraulic system faults.

Reference address:Research on flow detection method of hydraulic system based on time difference method

Previous article:Design of a New CMOS Image Sensor
Next article:High-precision bioimpedance measurement solution using AD5933

Recommended ReadingLatest update time:2024-11-16 17:56

STM32 reads and writes CPLD via FSMC
STM32 uses FSMC to read and write CPLD programs. CPLD is hung on the address line and data line of STM32. CPLD is regarded as an off-chip RAM for reading and writing. On the board I made, CPLD is hung in the fourth area, so the base address is 0x6c000000. It is read and written through FSMC. The program is relatively
[Microcontroller]
Design of orthogonal signal source filter based on CPLD and DDS
1 Introduction Since the traditional multi-waveform function signal generator needs a large number of separate components to realize, and the design is complex, a multi-waveform function signal generator based on CPLD is proposed here. It uses CPLD as the processor of the function signal generator, with a singl
[Embedded]
Design of orthogonal signal source filter based on CPLD and DDS
Design of multi-channel ADC system based on DSP and CPLD technology
Introduction --- With the application and development of modern electronic technology, the content of digital signal processing is becoming increasingly complex, and ADC is an inevitable process to achieve conversion from analog to digital. In response to this situation, a multi-channel ADC system design method is pr
[Analog Electronics]
Design of DSP Human-Machine Interface Module System Based on CPLD
CPLD (Complex programmable Logic Device) is developed on the basis of traditional PAL and GAL, and has obvious characteristics such as multiple working modes and high integration, high speed and high reliability. It has very wide applications in ultra-high-speed fields and real-time measurement and control. Today's CP
[Embedded]
Design of DSP Human-Machine Interface Module System Based on CPLD
Design of Dual CAN Controller for Battery Management System Based on CPLD
The battery management system is an important electronic control unit in hybrid electric vehicles. It has the function of ensuring the normal, reliable and efficient operation of the battery and is a bridge between the battery and the electrical equipment. During the development and mass production process, its inte
[Embedded]
Latest Analog Electronics Articles
Change More Related Popular Components

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

About Us Customer Service Contact Information Datasheet Sitemap LatestNews


Room 1530, 15th Floor, Building B, No.18 Zhongguancun Street, Haidian District, Beijing, Postal Code: 100190 China Telephone: 008610 8235 0740

Copyright © 2005-2024 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号