TI closes the gap between high speed and accuracy with new SAR ADC family

TI closes the gap between high speed and accuracy with new SAR ADC family, including industry's fastest 18-bit ADC

Engineers can design high-speed digital control loops with ultra-high dynamic range and ultra-low latency while reducing power consumption by 65%

June 9, 2021, Beijing - Texas Instruments (TI) today expanded its high-speed data converter product line with a new series of successive approximation register (SAR) analog-to-digital converters (ADCs) that enable high-precision data acquisition in industrial designs. The ADC3660 series achieves excellent dynamic range at ultra-low power and includes eight SAR ADCs with resolutions of 14, 16 and 18 bits and sampling speeds of 10-125MSPS, helping designers improve signal resolution, extend battery life and enhance system protection.

Improving the accuracy of high-speed data acquisition meets the growing demand for real-time control in industrial systems. In high-speed digital control loops, ADCs monitor and respond to rapid changes in voltage or current in complex systems, helping to prevent costly damage to critical components in power management systems. As the number of data-intensive tasks in industrial systems increases, the need for systems to make quick decisions to prevent system failures increases, increasing the need for faster speeds and higher accuracy.

Protecting industrial systems with faster response times in digital control loops

The ADC3660 family offers 80% lower latency than competing devices at similar speeds. For example, system designers can achieve an ADC latency of one clock (8ns) using the 125MSPS, 14-bit, dual-channel ADC3664. The family's ultra-low latency enables high-speed digital control loops in a variety of industrial systems to more accurately monitor and respond to voltage and current peaks, improving tool accuracy in applications such as semiconductor manufacturing.

Industry-leading noise performance at ultra-low power

Until now, engineers designing industrial systems have had to choose between excellent noise performance and low power consumption. This is an especially difficult decision for engineers designing battery-powered devices that require precise data acquisition. The ADC3660 family eliminates this trade-off. For example, the ADC3683 (the industry's fastest 18-bit, 65MSPS ADC) improves noise performance in narrow-band frequency applications such as portable defense radios, delivering 84.2dB signal-to-noise ratio (SNR) and -160dBFS/Hz noise spectral density while maintaining low power consumption of 94mW per channel. The 10MSPS, 14-bit ADC3541 consumes 36mW of total power, simplifying thermal management and extending battery life in power-sensitive applications such as GPS receivers or handheld electronics. The 65MSPS, 16-bit ADC3660 delivers 82dBFS SNR, improving image resolution in sonar applications, while consuming 65% less power than competing devices (71mW per channel). Watch the video "Improving Signal Detection in Industrial Applications" to learn more about how the series' noise performance improves accuracy and image resolution.

Reduce design complexity by leveraging integrated features and high sampling frequencies

The high sampling speed and integrated features of the ADC3660 family help designers reduce the number of components in their systems. For example, the ADC3683 achieves a sampling rate four times faster than comparable 18-bit devices at twice the channel density; it also supports an oversampling technique that pushes the harmonics of the desired signal to higher frequencies, which enables designers to reduce the complexity of anti-aliasing filters and reduce the number of system components by 75%.

Other features that reduce design complexity include on-chip decimation options that allow designers to easily remove unwanted noise and harmonics from the system and improve SNR and spurious-free dynamic range by up to 15 dB. These decimation options, along with a complementary metal oxide semiconductor (CMOS) interface, allow designers to use these ADCs with Arm®-based processors or digital signal processors instead of field programmable gate arrays (FPGAs), helping to reduce system costs.

Additionally, an integrated digital buck converter with a sophisticated digitally controlled oscillator reduces the required processor resources. For more information, read the technical article “How to Simplify AFE Filtering with a High-Speed ​​ADC with Internal Digital Filters.”