Schematic diagram of ordinary keyboard circuit

　　The keyboard has two signal lines connected to the host, namely the clock line (KBDCLK) and the data line (KBCDATA). The clock line provides the clock signal for the keyboard to communicate with the host. It is sent by the keyboard and the falling edge is valid. That is to say, at the falling edge of each clock, the host reads the data prepared by the keyboard into the accumulator "ACC", and sends it to the CPU for processing after reading the valid "stop bit". But for the same keyboard, the clock cycle, frequency, and level are the same; they will be slightly different for different keyboards. In the same keyboard, the clock of all data sent is the same. So this signal has nothing to do with the key information and is also a black signal. The keyboard has different keys. After they are selected accordingly, they will send the corresponding key code data to the host through the data line. Therefore, in the figure, only the red signal is on the data line.

　　Figure 1. Ordinary keyboard circuit