Abstract: LDMOS RF power amplifiers dominate the GSM and CDMA base station markets due to their extremely high price/performance ratio. A key factor in ensuring high performance when using LDMOS amplifiers is to compensate the gate bias voltage to maintain a constant quiescent current as temperature changes. The Dallas Semiconductor DS1870 bias controller is one of many LDMOS RF power amplifier bias solutions currently available. This application note describes the implementation of an analog bias solution using the DS4303.
Figure 1. DS4303 functional block diagram
To calibrate the circuit, connect the required DS4303 output voltage to the VIN pin and adjust the signal to pull low to trigger the DS4303 to update the output voltage. Once the DS4303 has completed the update, the quiescent current is measured using a current sense amplifier; and the process is repeated until the appropriate bias voltage is reached. The input connected to the DS4303 must be kept stable to ensure that its output voltage reaches the correct value.
Figure 2. DS4303 LDMOS RF power amplifier bias circuit
Keywords:DS4303 LDMOS RF
Reference address:Using the DS4303 to Bias an LDMOS RF Power Amplifier
DS4303 Overview
The DS4303 (Figure 1) is a sample-and-hold voltage reference that accepts an analog input voltage and recovers that voltage at its output using a 12-bit digital-to-analog converter (DAC). Once the output has recovered the input voltage, the chip stores the output code in an EEPROM, generating a nonvolatile analog reference voltage. The output voltage is generated by an internal low temperature coefficient reference and buffered by a rail-to-rail op amp.Figure 1. DS4303 functional block diagram
DS4303 LDMOS Bias Circuit
The circuit shown in Figure 2 can be used to temperature compensate the gate voltage of an LDMOS. The output voltage of the circuit is equal to the VOUT of the DS4303 multiplied by 2 plus the VBE of the PNP. The voltage of the DS4303 after doubling is a voltage source with a low temperature coefficient. The temperature coefficient of the VBE of the PNP tube is about +2mV/°C, which provides temperature compensation for the LDMOS. Assuming that the PNP tube and the LDMOS have a good thermal path, this circuit can provide good temperature compensation for the LDMOS.To calibrate the circuit, connect the required DS4303 output voltage to the VIN pin and adjust the signal to pull low to trigger the DS4303 to update the output voltage. Once the DS4303 has completed the update, the quiescent current is measured using a current sense amplifier; and the process is repeated until the appropriate bias voltage is reached. The input connected to the DS4303 must be kept stable to ensure that its output voltage reaches the correct value.
Figure 2. DS4303 LDMOS RF power amplifier bias circuit
Comparison of DS4303 Bias Circuit and DS1870 Solution
The main advantages of the DS4303 analog circuit solution are simplicity and low cost. If the circuit is placed close to the LDMOS, the good thermal path between the PNP tube and the LDMOS can make the gate voltage change correctly with temperature. Another advantage of this solution over the lookup table is that it is easy to program because the programming is for a single temperature bias point. This solution is fully analog after the initialization programming is completed, so once the system is calibrated, updating the lookup table will not cause output transients.
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