Principle and application of high-speed analog-to-digital converter AD9057

    Abstract: AD9057 is a high-speed analog-to-digital converter produced by the American ADI Company. It has high speed, low power consumption, small size, low price and easy to use. This article introduces its working principle, usage method and typical applications in medical imaging instruments. It also gives design points and precautions based on practical applications. Finally, it discusses the general principles that should be followed during the design process of high-speed analog-to-digital converters. in principle.

    Keywords: High-speed analog-to-digital converter, medical equipment data acquisition AD9057

Analog-to-digital converters are the core devices in modern digital instrumentation. Among a wide variety of analog-to-digital converters, the analog-to-digital converters designed and produced by the American company ADI (Analog Device International) have always been highly praised, and the AD9057 is the leader. It is widely used in medical imaging equipment and medical information equipment due to its many advantages such as high speed, low power consumption, small size, low price and easy use.

1 Overview

1.1 Performance characteristics of AD9057

The main features of AD9057 are as follows:

●Contains 8-bit low-power analog-to-digital converter;

●With 120MHz analog signal bandwidth;

●With on-chip 2.5V reference voltage source and track/hold circuit;

●1V peak-peak (Vp-p) analog voltage input;

●Powered by a single +5V power supply;

●Suitable for digital logic systems powered by +5V or +3V;

●With sleep mode, the low consumption in sleep mode is less than 10mW;

●Three sampling rate levels of 40MHz, 60MHz and 80MHz are available;

●Using a 20-pin SMD plastic package (20-SSOP), the operating temperature range is -40~+85℃.

1.2 Introduction to pin configuration and pin functions

The pin configuration of AD9057 is shown in Figure 1, and Table 1 lists the function description of each pin.

Table 1 Pin functions of AD9057

2 Use of AD9057

2.1 Analog signal input

The analog signal input of AD9057 is a unipolar input, and the internal resistance of the input terminal is about 150kΩ. The analog signal is first buffered at the input and then provided to a track/hold circuit, which maintains the stability of the input signal throughout the data conversion period. The input terminal of AD9057 must provide a DC bias voltage of approximately +2.5V (±10% error, 6μA load capacity). This voltage can be provided by other circuits or directly provided by the BIASOUT pin of AD9057. The analog signal input coupling methods of AD9057 usually include AC coupling and DC coupling. Figure 2 shows the two forms of coupling circuits.

2.2 Reference voltage

AD9057 has a stable and high-precision built-in +2.5V reference voltage with a load capacity of 300μA. It is output by the VREFOUT pin and can be directly input to VREFIN. It must be noted that the output of the reference voltage requires a 0.1μF ceramic capacitor for decoupling. When using the built-in reference voltage, the peak-peak value, center value and voltage range of the analog signal are as follows:

Peak-to-peak value: VRANGE (pp) = 1V;

Center value: VMIDSCALE=2.5V;

Voltage upper limit: VTOP=3.0V;

Voltage lower limit: Vbottom=2.0V.

In some applications with higher reference voltage requirements, an external reference voltage can be input at the VREFIN pin, while the VREFOUT pin is left floating. When using an external reference voltage, the peak-to-peak value, center value, and voltage range of the analog signal are as follows:

Peak-to-peak value: VRANGE (pp) = VREFIN/2.5;

Center value: VMIDSCALE=VREFIN;

Voltage upper limit: VTOP=VREFIN+VRANGE/2;

Voltage lower limit: Vbottom=VREFIN-VRANGE/2.

2.3 Digital logic interface

The versatility of the AD9057's digital logic interface makes it easy to use in digital systems powered by +5V or +3V. For input signals (mainly using clock ENCODE and power-down control PWRDN), the level of logic "1" only needs to be greater than +2V, and the level of logic "0" only needs to be less than +0.8V; for output signals, when When the digital power supply VD is +5V, the level of the output logic "1" will be greater than +4.95V; when the digital power supply VD voltage is +3V, the level of the output logic "1" will be greater than +2.95, and in both cases The level of logic "0" is less than +0.05V.

2.4 Timing and power consumption

The sampling frequency of AD9057 can be 5~80MSPS depending on the sampling rate level of the chip. The duty cycle of the sampling clock is generally 50%. Changes in the duty cycle will affect the working performance of AD9057; the power consumption of AD9057 when working at full speed is about 190~ 280mW, the power consumption in sleep mode is about 6~10mW.

3 Application in medical imaging equipment

The AD9057 analog-to-digital converter has the advantages of high speed, low power consumption, small size, low price, ease of use and excellent high-speed sampling and wideband analog signal input performance, making it an ideal choice for analog-to-digital conversion of video signals in medical imaging equipment systems. ideal device choice. Figure 3 is a schematic block diagram of applying the AD9057 high-speed digital converter to complete the digitization of video RGB signals in a medical imaging equipment system. Figure 4 is its actual circuit schematic.

4 Application Notes

Although the AD9057 is very simple to use, the requirements for external conditions are not strict, and debugging is not complicated. However, when designing specific application circuits, especially the layout and wiring of printed circuit boards, it is also the same as other high-speed analog-to-digital converters. Certain rules must be followed. If these principles are violated, signal noise may increase or even There is no digital data output at all. According to the application experience of high-speed digital converters, the following points should be paid attention to when using them:

(1) Power supply selection: It is best to use low-noise linear power supply, such as three-terminal voltage regulator 78L12, 78L05 and other lines. The linear power supply should be as close as possible to the high-speed analog-to-digital converter. Generally, switching power supplies should not be used as high-speed analog-to-digital converters. Converter power supply;

(2) Decoupling of power supply: Analog power supply, digital power supply, reference power supply and input common terminal should use 0.1μF capacitor and 2.2μF bipolar capacitor in parallel to bypass their respective grounds. The decoupling capacitor should be as close as possible to the high-speed analog-to-digital converter. It is best to use surface mount components to keep the leads as short as possible. The layout should be on the same level as the high-speed analog-to-digital converter to reduce the inductance and capacitance of the register. The selected capacitor should have good high-frequency decoupling properties, and it is usually best to use ceramic capacitors;

(3) Ground processing: The actual separation of analog ground and digital ground will help eliminate capacitive coupling and interference. A multi-layer circuit board with a complete and independent ground plane and power plane should be used to ensure signal integrity. Integrity. If analog and digital grounds are sufficiently isolated, all ground pins can be placed on the same plane. When using separate ground planes, the physical location of the analog and digital grounds of the high-speed analog-to-digital converter should be considered. The impedance between the two ground planes should be as small as possible, and the AC and DC voltage difference between the two should be less than 0.3V to avoid device damage and deadlock. The analog ground and digital ground should be connected at a single point. You can use low-resistance surface-mount resistors (1 to 5Ω, ferrite beads, or direct short circuit to avoid interference to the analog ground by the noisy data ground current;

(4) Processing of sampling clock: The sampling clock input should be processed as an analog input signal and kept away from any analog input and digital signals. A high-speed CMOS buffer (such as 74AHCT04) should be used at the end of the clock close to the high-speed analog-to-digital converter. Improve the performance of the clock, thereby reducing overshoot and ringing. The instability of the clock will not reduce the performance of high-speed analog-to-digital conversion;

    (5) Digital interface processing: Digital interface circuits should use digital output data latches (such as 74HCT574) Wait and keep it as close as possible to the high-speed analog-to-digital converter to reduce the capacitive load of the high-speed analog-to-digital converter. Excessive capacitive load may increase the internal noise of the high-speed analog-to-digital converter;

(6) High-speed digital signal lines should be kept as far away from analog signal lines as possible;

(7) Analog ground wires should be placed on both sides of the analog signal input pin to isolate it from digital signals and clocks;

(8) All signal lines should be as short as possible, and 90° corners should be avoided.