Abstract: AD7887 is a 12-bit ADC that can operate from a single power supply of 2.7V to 5.25V. It has a throughput rate of 125kSPS. It is characterized by high speed, low power, multiple working modes to choose from, and flexible power management mode selection. It is currently the smallest 12-bit ADC. This article introduces the functions, principles and application circuits of AD7887.
1 Overview
The AD7887 is a high-speed, low-power 12-bit ADC that operates from a single power supply of 2.7 to 5.25V and has a throughput rate of 125kSPS. Its input terminal is equivalent to a single-ended sampler with a sampling period of 500ns. After conversion, any signal can be output from the output terminal in binary encoding form. AD7887 has two operating modes of single/dual channel and flexible power management mode, which can be converted through the control register on the chip. In the default single-channel mode, the AD7887 can also be used as a read-only ADC. The chip is packaged in an 8-lead SOIC μSOIC package.
The main features of the AD7887 are as follows:
●It is currently the smallest 12-bit single/dual channel ADC;
●Adopt CMOS structure to ensure low power consumption;
●With automatic power off mode;
●Can be used as a read-only ADC in default mode;
●With universal serial I/O port.
AD7887 has a wide range of applications and can be widely used in battery-powered systems such as personal digital assistants, medical instruments, and mobile conferencing. It can also be used in instrument detection and control systems and high-speed modems.
2 pin function
Figure 1 shows the pin arrangement of the AD7887. The function of each pin is as follows:
Pin 1 (CS): Chip select pin, active low level. This pin provides two functions, one is to enable the AD7887 to start working; the other is to stimulate the transmission of serial data. When the AD7887 works in the default value mode, the CS pin can also be used as a shutdown pin, that is, when CS is connected to high level, the AD7887 is in shutdown mode.
Pin 2 (VDD): Power input pin. The range of VDD is 2.7~5.25V. When the AD7887 is used in dual-channel operating mode, this pin is used to provide a reference voltage.
Pin 3 (GND): Ground pin.
Pin 4 (AIN1/VREF): Analog input/reference voltage input terminal. In single-channel mode, this pin is used as a reference voltage input. At this time, this pin is connected to the internal reference voltage (+2.5V) or driven by an external reference voltage. The external reference voltage range is 1.2V~VDD; in dual-channel mode Under this condition, this pin is used as the second analog input terminal AIN1, and the voltage range at this time is 0~VDD.
Pin 5 (AIN0): Analog input terminal. In single-channel mode, the analog input voltage range of this pin is 0~VREF; in dual-channel mode, the analog input voltage range is 0~VDD.
Pin 6 (DIN): data input. On each rising edge of SCLK, data is sent to the AD7887 control register from this pin. If DIN and GND are connected, the AD7887 will be the default single-channel read-only ADC.
Pin 7 (DOUT): data output terminal. The conversion structure of the AD7887 is output from this pin in the form of a serial data stream. The data stream includes 4 leading 0s and the subsequent 12-bit conversion data.
Pin 8 (SCLK): serial clock input. Used to provide clock pulses for data access, writing control registers, and A/D conversion.
3 Working principle
3.1 Control register
The control register of AD7887 is an 8-bit write-only register. At each rising edge of SCLK, data is sent to the AD7887 through the DIN pin and simultaneously sent to the control register. The transmission of this data requires a total of 16 consecutive clock pulses, and valid information is only sent to the control register on the first 8 rising edges. The MSB is the first bit of the data stream.
The specific control register format is as follows:
DONTC | ZERO | REF | SIN/DUAL | CH | ZERO | PM1 | PM0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
The bit functions in the AD7887 control register are listed in Table 1, and the selection methods of PM1 and PM0 in the table are listed in Table 2.
Table 1 Bit functions of control register
Bit | code | illustrate |
7 | DOUTC | irrelevant items |
6,2 | ZERO | This bit must be 0 to ensure normal operation of the AD7887 |
5 | REF | Reference bit. When this bit is 0, the reference voltage on the chip is valid, and when it is 1, it is invalid. |
4 | SIN/DUAL | Single/dual channel selection. When this bit is 0, it is in single-channel mode, and the AIN1/VREF pin is used as the VREF function; when this bit is 1, it is working in dual-channel mode, where VDD is the reference voltage, and the AIN1/VREF pin is used as the AIN1 function. as a second analog input channel. In order to obtain the best efficiency of AD7887, in dual-channel mode, the internal reference voltage should be invalid, that is, REF=1 |
3 | CH | channel bit. When the chip works in dual-channel mode, this bit determines which channel to convert next. In single channel mode, this bit is always 0 |
1,0 | PM1,PM0 | Power management mode selection. Used to determine the 4 working modes of AD7887 (see Table 2 for details) |
Table 2 Power management mode selection
PM1 | PM0 | Operating mode |
0 | 0 | Mode 1. In this mode, when CS=1, AD7887 does not work; when CS=0, AD7887 works normally. That is, the AD7887 turns on the power on the falling edge of CS and turns off the power on the rising edge of CS. |
0 | 1 | Mode 2. In this mode, the power supply to the AD7887 is always on regardless of the state of the pins |
1 | 0 | Mode 3. In this mode, the AD7887 automatically turns off the power supply at the end of each conversion regardless of the state of the pin. |
1 | 0 | Mode 4. In this standby mode, the AD7887 is partially powered off while the on-chip reference voltage remains on. This mode is somewhat similar to Mode 3, but the power turns on faster. And REF should be 0 to ensure that the reference voltage on the chip is valid |
3.2 Conversion process
The AD7887 is an analog-to-digital converter based on charge redistribution. Figure 3 shows the simplified structure of the ADC. When SW2 is closed and SW1 is connected to point A, the comparator is in a balanced state, and the sampling capacitor obtains the signal from AIN to achieve ADC and normal sampling.
When the ADC starts converting, SW2 is disconnected and SW1 is connected to point B, the balance of the comparator is broken, the control logic and charge are redistributed, and the DAC is used to add or subtract the charges in the appropriate amount of sampling capacitors to make The comparator returns to equilibrium again. When the comparators balance again, the conversion is complete and the control logic generates the ADC output code.
3.3 Serial interface
The AD7887 provides switching pulses from a continuous clock while controlling information transfer in the chip. Figure 4 is the serial interface timing diagram of the AD7887. CS is the chip enable terminal. The chip is started on the falling edge of CS, and the input signal is sampled from the second rising edge of SCLK after the falling edge of CS. The time from the falling edge of CS to the input signal being sampled is recorded. is the sampling time (tACQ), which also includes the 5μs chip startup time. On the second rising edge of SCLK, the chip changes from the sampling state to the holding state, and the conversion process begins. It takes about 14 and a half SCLK cycles to complete the entire conversion process. After the conversion is completed, the rising edge of CS will reset the bus to tri-state and stop the chip. If it still remains low at this time, a new conversion will continue. During data transmission, writing the control register occurs on the first 8 rising edges of SCLK. When the AD7887 is used in read-only mode, every bit in the control register is written with 0.
4 application circuit
The AD7887 can be connected directly to many different types of microprocessors through its serial interface. The following is a serial interface connection circuit between the AD7887 and an ordinary microcontroller or digital signal processor (DSP).
4.1 AD7887 and TMS320C5x connection circuit
Data conversions synchronized with the AD7887 can be obtained using the serial interface on the TMS320C5x across a sequence of clock pulses and synchronized excitation signals. The serial port of TMS320C5x can work in pulse mode under the action of its internal CLKK (TX continuous clock) and FSX (TX synchronous excitation). At this time, its control register (SPC) should be set to: FO=0, FSM=1, MCM=1, TXM=1. The connection circuit is shown in Figure 5.
4.2 AD7887 and DSP56xxx connection circuit
Figure 6 shows the synchronous serial interface SSI (Synchronous Serial Interface) connection circuit between AD7887 and DSP56xxx produced by Motorola. The SSI of this circuit works in synchronous mode (SYN=1, FSL1=1, FSL0=0). The word length can be set to 16 bits by setting WL1=1 and WL0=0 in CRA. An inverter should be set between the SCLK pin of DSP56xxx and the SCLK pin of AD7887.
5 Conclusion
The AD7887 introduced in this article is currently the smallest 12-bit single/dual-channel ADC. It can operate on a single power supply of 2.7 to 5.25V, and has the characteristics of high speed and low power consumption. It also has flexible power management modes, and these modes Conversion can be done via on-chip control registers. In the default single-channel mode, the AD7887 can also be used as a read-only ADC. AD7887 can be widely used in sampling battery-powered PDA personal digital assistants, medical instruments, mobile communications, instrument detection and control, and high-speed modems.
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Recommended ReadingLatest update time:2024-11-16 18:06
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