System design of admittance measuring instrument based on C8051 microcontroller and FPGA

The wide application of virtual instruments allows users to design their own instrument systems according to their needs. The passive network admittance measuring instrument is a specific application of the virtual instrument design idea, aiming to realize automatic measurement of the admittance of the port network. The measuring instrument uses the C8051 microcontroller as the control and processing core and uses the programmable logic device EPF10K10. It generates a signal source based on the DDS principle, connects the signal source to the network to be measured, and differentially amplifies the voltage and current at both ends of the network to make it The output voltage reaches the maximum input voltage of the ADC as much as possible, and then A/D sampling is performed. When sampling, the frequency changes with the signal frequency. 32 points are collected in a cycle. P1 and P2 of the microcontroller are used to directly receive the data while sampling. take over. Perform Fast Fourier Transform (FFT) on the sampled current and voltage data, and calculate their module value and phase respectively. Then the module value of the admittance is the ratio of the current module value and the voltage module value, and the phase is the phase of the current and voltage. Difference. Experiments have confirmed that the admittance measuring instrument can select an appropriate range according to different measured objects, and can change the signal frequency step by step (the frequency is directly entered on the keyboard) to achieve accurate measurement.

System functions and indicators

1. Make a sine wave signal generator with the following technical specifications:

a. It can generate frequencies of 100Hz, 300Hz, 1kHz, 3kHz, and 10kHz, and the absolute value of the frequency error is less than 1% of the required frequency:

b. The output voltage peak-to-peak value is 1V, and the absolute value of the output voltage error is less than 20mV;

c. The output resistance is less than 1Ω, and the output waveform has no obvious distortion.

2. Implement the measurement circuit of conductance Re［Y］, susceptance Im［Y］, admittance mode |Y| and admittance angle φY of port network N0. The technical specifications are as follows:

a. The measurement range of conductance Re [Y] is 0.1mS ~ 10mS, which is divided into several ranges. The absolute value of the measurement error is less than

10% of the theoretical calculated value;

b. The measurement range of susceptance Im［Y］ is 0.1ms～10ms, which is divided into several ranges. The absolute value of the measurement error is less than 10% of the theoretical calculation value:

c. The absolute value of the measurement error of the admittance mode |Y| is less than 10% of the theoretically calculated value;

d. The measurement range of the admittance angle φY is ±90°, and the absolute value of the measurement error is less than 5% of the theoretically calculated value.

play part

1. Extend the measurement range of Re[Y] and Im[Y] to 0.01mS~100mS, and the measurement error requirements remain unchanged.

2. Automatic measurement function

a. Sine wave signal generator

The frequency can start from 100Hz, increase in steps of 100Hz, and finally end at 10kHz;

b. It can continuously measure, store and playback the Re[Y] and Im[Y] (or |Y| and φY) of the network at the above frequency points, where Re[Y] and Im[Y] ( or |Y|) measurement with automatic range conversion function;

c. Can display the frequency characteristic curves of the above four parameters respectively.

System solution design and implementation

This system uses the FPGA chip to create a sine wave signal source V(t)=Vmcos2πft. Through the voltage measurement circuit and current measurement circuit, the input port network is used to measure the voltage V(t)=Vmcos2πft and current i(t)=Imcos at both ends of the port. (2πft+φ) is sampled and the sampled data is stored in the memory. Then judge the amplitude of the sampled voltage V(n) and current i(n) data, and determine the corresponding measurement range according to the amplitude values ​​V(n)max and i(n)max of the voltage and current; Perform fast Fourier transform to obtain the amplitude spectrum and phase spectrum of the sampled voltage and current, calculate the voltage module value |V| and phase φv at the corresponding frequency, and the current module value |I| and phase φi, then the current module value and The ratio of voltage mode values ​​|I|/|V| is the admittance mode value |Y| of the network under test, and the phase difference φi-φv between current and voltage is the phase φY of the network admittance. Automatically change the output signal frequency f of the signal source, calculate the network admittance values ​​at different frequencies, and draw the network admittance changing curve with frequency. The implementation principle is shown in Figure 1.

Sinusoidal signal generator design

The sinusoidal signal is generated using DDS technology and implemented in FGPA mode. The basic structure of DDS consists of a reference clock, phase accumulator, memory (ROM), DAC and filter (LPF). Its composition is shown in Figure 2.

When using FPGA to design a DDS circuit, the phase accumulator is a key part that determines the performance of the DDS circuit. The phase accumulator is used in the design and is implemented through a combination of carry chain and pipeline technology, which can ensure high resource utilization. efficiency, and can greatly improve the performance and speed of the system.

The phase/amplitude conversion circuit is another key part of the DDS circuit. The main problem faced in the design is the cost of resources. This circuit usually adopts a ROM structure. The output of the phase accumulator is a digital sawtooth wave. By taking several of its bits as the address input of the ROM, and then through table lookup and calculation, the ROM can output the quantized data of the required waveform.

In FPGA (for Altera's devices), ROM is generally implemented by EAB, and the size of the ROM table increases exponentially with the increase in the number of address bits or data bits. Therefore, under the premise of meeting the signal performance, how to Reducing resource overhead is an important issue. In actual design, the symmetry and arithmetic relationships within the signal cycle are fully utilized to reduce the overhead of EAB.

FPGA-based DDS technology can achieve the frequency range of 1kHz to 1MHz, the frequency stability is better than 10-4, and it is easy to realize the frequency step function of 100Hz. In its peripheral circuit design, LF356 is used to connect as an emitter follower, which can ensure that the output resistance is less than 1Ω, meeting the design requirements. At the same time, the peak-to-peak value of the sine wave signal can be changed by adjusting the potentiometer, which facilitates system debugging.

Data collection system design

The data acquisition system uses two ADCs. During A/D sampling, the microcontroller simultaneously receives and stores data.

The ADC uses TLC5510, whose sampling rate is 20MSPS. While meeting the required indicators, there is no need to add peripheral memory.

During the data storage process, assuming that the number of acquisition points is 16, for the highest frequency of 10kHz, the sampling frequency is 160kHz, the sampling period is 1/(160×106)=6μs, and the system clock frequency of C8051F020 is 24MHz, which is a single Instruction cycle, the system clock is 1/24×106=50ns, and 70% of the instructions are completed within 1 to 2 system clocks. It is assumed here that there are two system clocks. Considering that the data storage process is addressing storage, approximately It takes 10 system clocks, and the corresponding time is 50×10=500ns=0.5μs, which can completely keep up with the conversion speed of TLC5510. After testing, the instruction execution time is 1.5μs, and 32 points can be sampled in one cycle. Therefore, there is no need to increase peripheral memory, make full use of existing microcontroller resources, and simplify the circuit.

Design of automatic range conversion system

Since the measured networks are different, the corresponding sampling resistors also need to be adjusted appropriately to ensure the accuracy of sampling. The system must have an automatic range conversion function. A relay is used to connect several resistors in parallel, and the on-off of the relay is controlled by a microcontroller to achieve the purpose of range conversion.

The measuring range determination process is as follows:

As far as the current sampling circuit is concerned, the driving voltage of the TLC5510 is 750mV ~ 250mV, so the current sampling voltage must be within this range to ensure accurate sampling (considering that the peak-peak value of the index output voltage is 1V, the absolute value of the output voltage error less than 20mV), so there is:

3/4》Vi》1/4 (1-1)

And Vi = Rs/(Rs+Z), so there is:

3／4》Rs／（Rs+Z）》l／4 (1-2)

Simplified, the following formula can be obtained:

3 Rs》Z》Rs／3（1-3）

Considering the indicators, it is necessary to ensure that the measurement range of conductance Re [Y] is 0.1mS ~ 10mS, so Z is in the range of 100Ω ~ 10KΩ, corresponding to the following range:

First gear: Rs=30Ω, can measure: 90Ω >> Z >> 10Ω;

Second gear: Rs=270Ω, can measure: 810Ω >> Z >> 90Ω;

The third level: Rs=2.430KΩ, can measure: 7.290KΩ 》 Z 》 810Ω;

The fourth level: Rs=21.870KΩ, can measure: 65.610KΩ 》 Z 》 7.290 KΩ;

Fifth gear: Rs=196.830KΩ, can measure: 100KΩ 》 Z 》 65.610 KΩ.

The measurement range judgment standard is as follows (the voltage peak value after sampling is max_v_c, and the current peak value after sampling is max_j_c):

If max_v_c》3 max_i_c, the gear should be automatically thrown low;

if max_v_c

In other cases, it is set to the current normal range and does not change the gear. In actual debugging, this gear division was used to obtain relatively satisfactory measurement results.

Microcontroller control

The admittance measuring instrument uses the C8051 microcontroller as the control and processing core and is based on VC programming. It mainly implements the storage of current and voltage sampling data, performs FFT operations on the stored data, obtains the admittance module value and phase value, and performs automatic range judgment at the same time; Implement frequency sweep function, store frequency sweep data at the same time, display measurement results and waveforms, etc. The test results of various parameters are shown in Table 1, Table 2 and Table 3.