Interface Design between P51XA Single Chip Microcomputer and Graphic LCD Display

P51XA is a 16-bit single-chip microcomputer of PHILIPS Company, with large manageable memory space, fast running speed, support for real-time multi-tasking system, enhanced support for high-level language, and can be used in occasions requiring complex and high-speed control. It is highly compatible with MCS-5 in terms of architecture, facilitating rapid and smooth transition to high-performance microcontrollers. MGLS240128T of Beijing Jingdian Pengyuan Display Technology Co., Ltd. is a 240×128 dot-matrix graphic LCD (liquid crystal display) that can display graphics and curves, and can display 15×8 Chinese characters in full screen. It is suitable for occasions that require more display content. It contains T6963C controller and can directly interface with INTEL series microprocessors.

1 Introduction to P51XAG37 MCU and T6963C

The internal structure and external data bus of P51XA microcontroller are both 16-bit structures, supporting the expansion of external memory space of 1MB-16MB. The structure of P51XA core is optimized to overcome the bottleneck of single accumulator of general microprocessor. Each of several registers of its core can be used as accumulator, which can realize pre-fetch instruction and write back of operation data. When accessing external memory, P51XA can read 16 bytes with one ALE (geological latch enable) pulse, thus greatly improving the speed of accessing external memory. The memory of P51XA is organized in segments, each segment is 64KB. P51XA has two working modes: system mode and user mode. There are two stack pointers: SSP (system stack pointer) and USP (user stack pointer). The stack can be arranged in internal storage or in external memory. When running a real-time multi-tasking system, protection between tasks can be effectively achieved. P51XA supports four types of interrupts - exception interrupts, event interrupts, trap interrupts and soft interrupts. The vector interrupt method is used to speed up the response speed of interrupts. Figure 1 is a timing diagram of P51XA accessing a single data of the external data bus. When the clock frequency is 30 MHz, one clock cycle is 33.3ns.

Figure 2 shows the timing and parameters of T6963C. When P51XA works at 30 MHz, there is a certain difference in timing coordination with T6963C, which needs to be solved by software and hardware methods. When the operating speed meets the requirements, the clock frequency of XA can be appropriately reduced.

MGLS240128T uses T6963C controller and 8KB data buffer inside, and can work in graphic mode and text mode. When working in text mode, it can use its internal character generator or external character generator. But its character generator has small capacity. If only some specific Chinese characters need to be displayed in the system, a character generator can be established in the LCD's on-chip RAM and work in text mode. Here we mainly introduce the work in graphic mode. T6963C sets its display function through instructions. Instructions can have 1 or 2 parameters or no parameters. T6963C's instruction system has 10 instructions. Here we only introduce some instructions for graphic display. As shown in Figure 3.

The address arrangement of the display buffer inside MGLS240128T in the system is determined by its address decoding circuit, while the first address of the graphic display area can be set by software. The scrolling effect can be achieved by modifying the display first address. The D7 bit of the first byte of the first address corresponds to a point in the upper left corner of the LCD display screen, followed by D6, D5, ... D0, etc., and then the next byte, etc., until the right boundary of the set graphic display area. Then the first byte of the next line, and so on. Before writing instructions, it is best to check its status word first. If T6963C is in an accurate ready state, you can write instructions. The order is to write parameters first, then write instructions. Its status word structure is shown in Figure 4.

Different status bits need to be detected when performing different operations.

(1) Display area settings

Set the first address of the graphics area: PAR1, PAR2, 42H, where PAR1 and PAR2 are the low byte and high byte of the first address of the graphics display area respectively, and 42H is the instruction code.

Set the width of the graphics area (bytes/line): PAR, 00H, 43H. Among them: PAR is the width expressed in bytes, 43H is the instruction code.

(2) Display switch

The format is as follows:

98H: Graphic display on

90H: Graphic display off

(3) Data automatic reading and writing mode settings

After setting the data automatic read/write mode, each time the display buffer is read/written, its internal address pointer is automatically increased by 1, the format is as follows:

B0H: Set automatic write

B1H: Set automatic reading

B2H/B3H: Automatic read/write end

(4) One-time data reading and writing

There are 6 entries in total, as shown below (DATA is the data to be written, and no data is required for read operations):

DATA C0H: data write, address plus 1

C1H: data read, address plus 1

DATA C2H: data write, address minus 1

C3H: data read, address minus 1

DATA C4H: data write, address unchanged

C5H: data read, address unchanged

(5) Bit operations

This instruction can set or clear a byte of the display buffer at the current address pointer position. The format is as follows:

1 1 1 1 n3 n2 n1 n0

Among them: n3＝1 is set to 1, n3＝0 is cleared to 0, n2 n1 n0 is the bit address in the byte. Various curves or graphs can be displayed on the screen using bit operation instructions.

2 Interface Hardware Design

Although P51XA has an SFR (special function register) bus, which can connect the extended external interface devices to the SFR bus, not every derivative product leads the SFR bus to the outside of the chip. Therefore, in most cases, similar to MCS-51, the external data memory space is used to expand the external interface. Since the occasions where XA is generally used often require a larger data memory space, and the external data memory space of XA is a segmented structure, in order to make the interface circuit simple, the external interfaces that need to be expanded in the system can generally be concentrated in a special segment, and at the same time, they can be arranged in the first 1KB space of the segment as much as possible, so as to facilitate access with direct addressing. In a simple foreground and background mode, the extended external interface can be directly accessed with an absolute address.

It should be noted that the external bus of P51XA has been optimized. The lower 4 bits of the address A0-A3 are not time-division multiplexed and the geological line A0 is not needed when the external bus is set to 16 bits. At this time, A0 is used as the write signal line of the high-bit data - WRH, and the original WR is used as the write signal line of the low 8-bit data - WRL. When expanding the 8-bit external interface device, it is generally arranged at an even address as much as possible. The LCD module MGLS240128T can directly interface with the P51XA bus. Its logic diagram is shown in Figure 5. Here, MGLS240128T is connected to the lower 8 bits of the XA data bus. When writing, the WRL control signal line is used. A1 of the XA address bus is used as the CD control of MGLS240128T. According to the specific arrangement of the system, the high bit of the XA address line is decoded and the chip select line of MGLS240128T is driven.

3 Interface software design

The interface software is written in HI-TECH C and is divided into two levels: interface functions that provide services to applications and drivers that access hardware. The interface functions implement initialization and display of Chinese characters, graphics, etc. by calling the driver.

According to the analysis of the instruction system of T6963C, the instructions include double-byte data, single-byte data and no data. Before reading and writing T6963C, it must be determined whether the operation can be performed based on its status register. The following are the three underlying functions for writing instructions/data and the initialization function:

4 Conclusion

P51XA is a high-performance 16-bit microcontroller that is highly compatible with the standard MCS-51. It provides a smooth transition to 16-bit microcontrollers for developers familiar with MCS-51, and also provides us with a wider range of choices.