Getting Started with the PIC24HJ Family: Configuration Bits and Clock Configuration

1. Download MPLAB X IDE

  Download the MPLAB x IDE for the corresponding system from the MPLAB x official website and install it. If you use C language editing, you also need to install the corresponding xc compiler editor. The author uses pic24hj256GP206A, so he uses xc16 or c30.

2. Introduction to MPLAB X Operation

Importing low-version projects

step 1,

Find import under file, enter the submenu and select MPLAB IDE v8 project.

Step 2:

   Click Browse and find the project file you want to import in the pop-up file box. Find the .mcp file in the project file and double-click it, or click Open. Then click Next.

step3:

   Select the corresponding chip device, downloader (or emulator), and compiler.

step4:

Finally, click Finish to open the project.

New Construction

Click File-->New Project-->Category::Microchip Embedded-->Project:Standalone Project-->Next-->The following steps are the same as above.

3. Configuration bit

Configuration bits are one of the most important things when programming PIC microcontrollers. The most important configuration bit is the FOSCSE_ configuration (it controls the oscillation mode and oscillation period of the chip). When I was a beginner, I often failed to achieve the expected results for the clock and timer because of incorrect configuration bits.

3.1、Quick configuration of configuration bits

Under the production menu, there is a set Configuration Bits, which is the MPLAB integrated configuration tool. Click it to get a list of configuration bits. Select the configuration according to your needs and then select output to generate source code to complete the configuration.

3.2、Interpretation of the meaning of each configuration bit

3.2.1 FBS

   FBS is the boot segment code configuration register

eg:

//Undefined boot RAM, boot segment code protection capacity, boot segment write protection enabled

_FBS(RBS_NO_RAM&BSS_SMALL_FLASH_STD&BWRP_WRPROTECT_ON);

3.2.2 FSS

   FSS is the secure code segment configuration register

eg:

// Undefined secure RAM, secure segment code protection capacity, secure segment write protection enabled

_FSS(RSS_NO_RAM&SSS_SMALL_FLASH_STD&SWRP_WRPROTECT_ON);

3.2.3 FGS

   FGS is the general code segment configuration register

eg:

//Standard code protection is enabled, general segment can be written

_FGS(GCP_ON&GWRP_ON);

3.2.4 FWDT

   FWDT is the watchdog configuration register. The watchdog is used to prevent the code from running away.

eg:

//WDT off, window enabled, watchdog 32 pre-scaling, 512 post-scaling

_FWDT(FWDTEN_OFF&WINDIS_OFF&WDTPRE_PR32&WDTPOST_PS512);

3.2.5 FOSCSEL

   FOSCSEL is the oscillator source selection register. This configuration bit controls the oscillator oscillation mode and frequency when the program is running. All related clock configurations must be performed based on this configuration bit.

eg:

// Internal FRC oscillator with PLL, start the device with user selected oscillator source

_FOSCSEL(FNOSC_FRCPLL&IESO_ON);

3.2.6 FOSC

Oscillator Configuration Register

// Clock switch enabled, OSC2 is a digital I/O pin, standard oscillation mode

_FOSC(FCKSM_CSECME&OSCIOFNC_OFF&POSCMD_NONE);

3.2.7 FPOR

POR Configuration Register

//The power-on reset time is 32 milliseconds

_FPOR(FPWRT_PWR32);

.3.2.8、FICD

In-circuit debug configuration registers

//Online debugging off, communication on PGEC2 and PGED2

_FICD(JTAGEN_OFF&ICS_PGD2);