NVIC concept: provides an interrupt controller for overall management of exceptions, called "embedded vectored interrupt controller". In simple terms, it is a module that provides and handles internal interrupts of the MCU.
NVIC library functions:
Interrupt Priority:
Before configuring NVIC, you need to understand a concept: interrupt priority, that is, the execution order of interrupts. The interrupt priority is divided into preemptive priority (preemptive priority) and response priority (following priority). Preemptive priority, as the name suggests, can preempt other people's interrupts and realize interrupt nesting. Response priority can only queue, and cannot preempt others' interrupts, that is, it cannot be nested.
The register for specifying the priority in STM32 is 4 bits, which are defined as follows:
Group 0: All 4 bits are used to specify the response priority NVIC_PriorityGroup_0 => Select Group 0
Group 1: The highest bit is used to specify the preemptive priority, and the lowest 3 bits are used to specify the response priority NVIC_PriorityGroup_1 => Select Group 1
Group 2: The highest 2 bits are used to specify the preemptive priority, and the lowest 2 bits are used to specify the response priority NVIC_PriorityGroup_2 => Select Group 2
Group 3: The highest 3 bits are used to specify the preemptive priority, and the lowest 1 bit is used to specify the response priority NVIC_PriorityGroup_3 => Select Group 3
Group 4: All 4 bits are used to specify preemptive priority NVIC_PriorityGroup_4 => Select Group 4 Preemptive priority (preemptive priority) and response priority (slave priority) values:
Notice:
1. If NVIC_PriorityGroup_0 is selected, the parameter NVIC_IRQChannelPreemptionPriority has no effect on the setting of the interrupt channel.
2. If NVIC_PriorityGroup_4 is selected, the parameter NVIC_IRQChannelSubPriority has no effect on the setting of the interrupt channel.
Interrupt channel:
Basic setting steps for NVIC interrupt:
Step 1: Use the void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup) function to configure the priority group.
For example: NVIC_PriorityGroupConfig (NVIC_PriorityGroup_0) is configured as group 0.
Step 2:
Interrupt initialization structure configuration, the structure type is defined as follows:
typedef struct
{
uint8_t NVIC_IRQChannel; //interrupt channel
uint8_t NVIC_IRQChannelPreemptionPriority; //Preemption priority
uint8_t NVIC_IRQChannelSubPriority; //Response priority
FunctionalState NVIC_IRQChannelCmd;
} NVIC_InitTypeDef;
Interrupt initialization structure default value:
{
NVIC_IRQChannel = 0x0;
NVIC_IRQChannelPreemptionPriority = 0;
NVIC_IRQChannelSubPriority = 0;
NVIC_IRQChannelCmd = DISABLE;
}
Step 3: The interrupt initialization structure initialization operation is as follows
NVIC_Init(&"NVIC_IRQChannel value");
Step 4: Switch on the general interrupt operation. In STM32, interrupts are enabled and disabled by changing the CPU priority.
(1) The following two functions are equivalent to turning off the total interrupt
void NVIC_SETPRIMASK(void);
void NVIC_SETFAULTMASK(void);
(2) The following two functions are equivalent to opening the general interrupt
void NVIC_RESETPRIMASK(void);
void NVIC_RESETFAULTMASK(void);
(3) The common operation is to turn off the interrupt first and then turn it on.
NVIC_SETPRIMASK(); // Disable Interrupts
NVIC_RESETPRIMASK(); // Enable Interrupts
The two types of functions should be used in pairs.
Square wave BLDC motor
Main tasks completed:
Starting from the BLDC square wave program without Hall elements, we can learn about the operating principle of BLDC without Hall elements - the six-step steering method.
The key to the six-step steering method is:
The key to controlling the rotation of BLDC is to determine the moment of phase switching. The point where the polarity of the back electromotive force changes between each two phase switching points corresponds to the point where the back electromotive force changes from positive to negative or from negative to positive, which is called the zero crossing point. Using this characteristic of the back electromotive force, as long as we can accurately detect the zero crossing point of the back electromotive force and delay it by 30°, it is the moment when phase switching is required.
Zero-crossing detection of BLDC:
The principle is: when the BLDC motor rotates, the rotation of the permanent magnet rotor generates a changing magnetic field inside the motor. According to the law of electromagnetic induction, each phase winding will induce a back electromotive force. The BEMF waveform of the BLDC motor changes with the position and speed of the rotor, and is generally trapezoidal.
The back electromotive force is sampled in the PWM_OFF interval. When the PWM at the driving end switches from the ON state to the OFF state, due to the inductance effect of the motor winding, the current in the winding will not disappear immediately, so the body diode of the lower bridge arm MOS tube will continue to flow to form a loop. Therefore, the terminal voltage of the disconnected phase winding is sampled in the PWM OFF interval. The obtained voltage value is proportional to the magnitude of the back electromotive force, and its zero-crossing point also directly reflects the zero-crossing point of the back electromotive force. In addition, when the PWM just enters the OFF state, due to the continuous flow of the body diode of the lower bridge arm MOS tube, the voltage of the disconnected phase will be clamped at -0.7V. Compare the back electromotive force detected at each moment with the back electromotive force at the previous moment. If the zero-crossing condition is met, the zero-crossing signal is returned for closed-loop speed regulation.
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