Overview of STM32 GPIO registers-EEWORLD

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A GPIO register is generally divided into three categories: a. control register; b. data register; c. latch register

A. Control register (GPIO_CRL or GPIO_CRH (CRL corresponds to the lower 8 bits, CRH corresponds to the upper 8 bits)). See page 106 of the manual for details.

CNFx[1:0]MODE[1:0]

XX00-----Input mode (generally not talking about speed)

XX01-----Output mode (10M rate)

XX10----Output mode (2M rate)

XX11----Output mode (50M rate)

In output mode (50M as an example)

0011----Universal push-pull output

0111----General open drain output

1011----Multiplexed push-pull output

1111----Multiplexed open drain output

In input mode

0000---Analog input (for ADC)

0100---Floating input

1000 --- Pull-up/pull-down input (when the corresponding ODR output is 1, it is pull-up, and when the output is 0, it is pull-down)

The specific applications are as follows:

B. Data registers 1) Input data register IDR; 2) Output data register ODR; 3) Bit set/clear register BSSR; 4) Bit clear register BRR

BSSR can realize the synchronous change of two bits; it can also realize "read, modify and write"

C. Latch register

This still has some problems????????????

The first two categories must be mastered. Every register of each peripheral must be read once and must be gone through.

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