STM32F10x Study Notes 8 (USART implements serial communication DMA method)

The USART of STM32F10x supports DMA mode and can generate an interrupt after DMA is completed. This is very helpful for application scenarios that need to receive or send large amounts of data.

 

Few ordinary 8-bit or 16-bit microcontrollers include DMA controllers, so many embedded programmers may not be familiar with DMA. Simply put, direct memory access (DMA) is used to provide high-speed data transfer between peripherals and memory or between memory and memory. Since there is no need for CPU intervention, data can be moved quickly through DMA, which saves CPU resources for other operations.

 

The STM32F10x has two DMA controllers with a total of 12 channels (DMA1 has 7 channels and DMA2 has 5 channels), each of which is dedicated to managing memory access requests from one or more peripherals. There is also an arbitrator to coordinate the priority of each DMA request.

 

According to the STM32 reference manual: "The DMA controller and the Cortex™-M3 core share the system data bus and perform direct memory data transfers. When the CPU and DMA access the same target (RAM or peripherals) at the same time, the DMA request will suspend the CPU from accessing the system bus for several cycles, and the bus arbitrator performs a circular schedule to ensure that the CPU can get at least half of the system bus (memory or peripheral) bandwidth." So we don't have to worry about the DMA controller monopolizing bus resources. The CPU can always get general bus time.

 

Next, we will take the data transmission of USART2 as an example to introduce DMA. First, from Figure 22 of the STM32 reference manual, we can see that the transmission function of USART2 can use the 7th channel of DMA1.

 

The setup work of using DMA transfer can be roughly divided into 6 steps:

1. Set the address of the peripheral register in the DMA1_CPAR7 register. When a peripheral data transfer request occurs, this address will be the source or destination of the data transfer. 

2. Set the address of the data memory in the DMA1_CMAR7 register. When a peripheral data transfer request occurs, the transferred data will be read from or written to this address. 

3. Set the amount of data to be transferred in the DMA1_CNDTR7 register. This value is decremented after each data transfer. 

4. Set the priority of the channel in the PL[1:0] bits of the DMA1_CCR7 register. 

5. Set the direction of data transfer, circular mode, incremental mode of peripherals and memory, data width of peripherals and memory, interruption when half of the transfer is generated, or interruption when the transfer is completed in the DMA1_CCR7 register. 

6. Set the ENABLE bit in the DMA1_CCR7 register to enable the channel. 

 

The code corresponding to step 1 is:

The code corresponding to step 2 is as follows, where p_str is a pointer pointing to the first address of the data to be transferred:

 

The code corresponding to step 3 is as follows. cnt is the amount of data to be transmitted. The serial port data is transmitted in bytes, so cnt here is the number of bytes of data to be transmitted.

 

The code corresponding to step 4 is as follows. The priority of DMA channel is divided into 4 levels: DMA_Priority_VeryHigh, DMA_Priority_High, DMA_Priority_Medium, DMA_Priority_Low. Here it is set to the lowest.

 

The code corresponding to step 5 is as follows:

 

The code corresponding to step 6 is as follows:

 

 

Actually, there should be 2 more steps before these 6 steps. First, before setting up DMA, you need to turn on the DMA clock:

 

Secondly, we need to set up USART to support DMA mode:

 

Or use the following function:

 

 

Once a DMA channel is started, it can respond to DMA requests from peripherals connected to the channel. How to start the next DMA transfer after completing a DMA transfer? This problem has troubled me for several days. Finally, I found the following sentence in the STM32 reference manual:

When the channel is configured in non-circular mode, no DMA operation will be generated after the transfer is completed (that is, the transfer count becomes 0). To start a new DMA transfer, it is necessary to rewrite the transfer count in the DMA_CNDTRx register while the DMA channel is closed.

 

Here is a simple example program:

Next, let's talk about how to generate an interrupt after the DMA transfer is completed. When half of the data is transferred, the half transfer flag (HTIF) is set to 1, and when the half transfer interrupt enable bit (HTIE) is set, an interrupt request will be generated. After the data transfer is completed, the transfer completion flag (TCIF) is set to 1, and when the transfer completion interrupt enable bit (TCIE) is set, an interrupt request will be generated.

There is a TCIE (Transfer completion interrupt enable) bit in the CCR register of DMA  

This bit is set and cleared by software. 

0: Disable TC interrupt 

1: Enable TC interrupt

 

So in order to use DMA interrupts, we need the following code:

 

 

Here is a simple example program. The uCOS semaphore is also used in the example program. The interrupt processing function notifies Task through the semaphore that the DMA transfer is completed: