MSP430G2755 Main Memory Bootloader UART Porting Guide

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MSP430G2755 Main Memory Bootloader UART Porting Guide [Copy link]

TI's MSP430 supports online upgrades by loading the Bootloader in the main program. Through the online upgrade function, customers can update the internal program of MSP430 and remotely repair Bugs at any time through an external processor. At the same time, TI also provides reference code based on MSP430G2553. This article describes in detail how to transplant the Bootloader of MSP430G2553 to MSP430G2755 and use the MSP 430G2553 Host to upgrade the MSP430G2755 Device. 1. Introduction to MSP430 Main Memory Bootloader In MSP430G2xx, there is actually a ROM version of BSL (Bootloader), but this BSL only supports online upgrade of external MCU through UART, and all protocols are fixed, and it is impossible to modify or change other interface methods for upgrade operation. Therefore, a Bootloader that can run in the main program is required to allow the external MCU to perform user-defined upgrade operations. At the same time, TI also provides a reference routine based on MSP430G2553, which can be downloaded through the following link. http://software-dl.ti.com/msp430 ... test/index_FDS.html

The reference code version used in this article is MSPBoot_1_01_00_00. The figure below shows the entire software framework of MSPBoot.

Figure 1 MSPBoot software framework

2. Code porting process of MSPBoot 2.1 Generation of MS430G2755 CMD file First, use the Per tool to generate CMD files (Generating Linker Files). Two CMD files will be generated by the Per tool, one for the MSP430G2755 Bootloader and the other for the MSP430G2755 application. The operation instructions are as follows,

C:\Users\a0223791\Desktop\MSP430-BSL-IAP\MSPBoot_1_01_00_00\linkerGen>perl MSPBo

[color= rgb(85, 85, 85)]otLinkerGen.pl -file lnk_msp430G2755_Uart_1KB -dev MSP430G2755 -params 0x8000 0x

[color= rgb(85, 85, 85)]FFE0 0xFC00 48 6 0x1100 0x20FF 0x80 0x1000 0x10BF

[color=rgb(85, 85, There are several important parameters as follows,

<0x8000 > = Start address of Flash/FRAM

For MSP430G2553 the address is 0xC000 , while the address of MSP430G2755needs to be modified to 0x8000 <0xFFE0 > = Address of interrupt vector table

[color=rgb(85, 85,=85)]The address of the interrupt vector table is 0xFFE0, which is the same for both MSP430G2553 and MSP430G2755. <0xFC00> = Start address of Bootloader

The starting address of the Bootloader is 0xFC00, which is the same for both. <48> =Size of the proxy table

The size of the proxy table

Here 48 corresponds to 12 interrupt vectors, each of which occupies 4Byte. <6> = Size of shared vectors

There are 3 (P1/Time/Dummy) interrupt vectors in the application, each of which occupies 2Byte, the corresponding parameters are 6. <0x1100> = Start address of RAM

85)]The starting address of RAM also needs to be modified toMSP430G27550x1100 <0x20FF > = End address of RAM

The ending address of RAM also needs to be modified toMSP430G27550x20FF  = Size of the stack

The default stack size for MSP430G2755 is 0x80 <0x1000> = Start address of info memory used for bootloader

The start and end addresses of Information are the same as those for MSP430G2553 and MSP430G2755, no modification is required <0x10BF > = End address of info memory used for The start and end addresses of bootloader Information are consistent with MSP430G2553 and MSP430G2755, so no modification is required. 85)]Note the modified parameter 6 and the number of interrupt vectors. The interrupt vectors in the Bootloader do not need to be modified. Only the interrupt vectors in the MSP430G2755 application App need to be modified. The following figure shows the distribution of interrupt vectors in the Bin file.

Figure 2MSP430G2755Interrupt vector

Figure 3MSP430G2755 Bin file corresponding to the virtual interrupt vector table

Note that 809C and 80E2 here correspond to P1_Isr and Timer_A, GPIO interrupt and timer interrupt in the MSP430G2755 application. The figure below shows the distribution of the virtual interrupt vector table in the MSP430G2755 Bootloader.

Figure 4MSP430G2755 Bootloader virtual interrupt vector table

2.2 Add CMD file to the project Add the CMD file generated in step 2.1 to the MSP430G2755 Bootloader and application App projects, as shown in the following figure. 85)][img]https://e2echina.ti.com/resized-image/__size/1230x0/__key/communityserver-blogs-components-weblogfiles/00-00-00-00-74/2018_2D00_11_2D00_27_5F00_161903.png[ /img]

Figure 5 MSP540G2755 CMD file

Please note that if you are using TI's default MSP430G2553 project, you need to select MSP430G2755 as the device model of the original project, delete the G2553 CMD file that comes with MSP430G2755, and use the generated MSP430G2755 CMD file. 2.3 Application txt conversion to c file Use the CCS compiler to compile the MSP430G2755 application. After the compilation is completed, a txt file download format will be generated. We need to convert this generated txt file into a .c file so that the .c file can be used by the main control MCU and downloaded to the MSP430G2755 through the Bootloader. The conversion operation instructions are as follows,

C:\Users\ a0223791\Desktop\MSP430-BSL-IAP\G2755_Porting\MSPBoot_1_01_00_00\430txt

[ align=left]_converter>430txt2C.pl App1_MSPBoot.txt AppForHostG2755.c App1

[color=rgb(85, 85, Through this step, the generated .c file is added to the main function file path in the main MCU. Here, the main control MCU we tested is MSP430G2553. The program after adding is shown in the figure below. Figure 6 Host MCU adds upgrade program

2.4 Write CRC check address information

85)]Through the previous step, we have added the application that needs to be upgraded in the main control MSP430G2553. At the same time, we also need to modify the CRC address information of the target upgrade chip (MSP430G2755) in the main MCU. The modification reference is as follows,

[color=rgb(85, 85, Figure 7 Adding CRC address information to MSP430G2553 Note that the CRC generation tool in the MSPBoot user guide is no longer needed to perform CRC verification. We can see that the CRC verification is actually calculated directly in the main MCU and the CRC value is placed in the specified location.

Figure 8MSP430G2553 Calculate CRC value

2.5 Modify the MSP430G2755 application program. Here we tested changing the default P1.1 and P1.2 UART ports of the MSP430G2553 to the P3.4 and P3.5 UART ports of the MSP430G2755 hardware to receive data. The actual reference code is as follows,

Figure 9MSP430G2755 UART port modification

Please note that in the MSP430G2755 application App, there are two interrupts used by default, namely P1 port and timer interrupt. You cannot directly block the P1 port and Timer interrupts. This will cause the MSP430G2553 to fail to start the application normally after the host master MSP430G2553 upgrades successfully. If these two interrupt vectors are not needed in the application, you need to modify the parameter <6> = Size of shared vectors in the first step of generating the CMD file. Through the above steps, we have completed the migration from MSP430G2553 to MSP430G2755 Bootloader. Now we summarize the entire program architecture of MSP430G2755 Bootloader and application App, and the analysis is as follows. We read the total code of MSP430G2755 in which the main program transplanted BootLoader through the tool, among which the MSP430G2755 storage Flash address analysis is as follows: 0x8000-0x8100 is the application program; 0xFBC0-0xFBF0 is the virtual interrupt vector table. 85)]From 0xFC00-0xFFD0 is the Bootloder

From 0xFFE0-0xFFF0 is the real interrupt vector table