Content-addressable memory (CAM) is a memory that addresses content. It is a special storage array RAM. Its main working mechanism is to automatically and simultaneously compare an input data item with all data items stored in CAM, determine whether the input data item matches the data item stored in CAM, and output the matching information corresponding to the data item. The CAM chip MCM69C232 of Motorola Company in the United States is a product with a high cost performance in the market, and is therefore widely used in network communications, pattern recognition and other fields. Its advantage in data retrieval is unmatched by software, and can greatly improve system performance.
1 Introduction to MCM69C232 chip
Content-addressable memory (CAM) is essentially a special memory based on RAM technology. Data items are stored in array units inside CAM. The number of bits of each data item is called "word width", and the number of all data items in the array is called "depth". The capacity of CAM is characterized by word width and depth. MCM69C232 is designed to store 4096 data items with a width of 64 bits.
MCM69C232 has two sets of data ports: control port and match port. The control port is used by the processor (CPU) to operate the CAM table, including inserting and deleting data table items, mode setting and analog matching, and reading information from the chip's internal status register. The retrieval of data items is completed through the match port.
Although based on RAM technology, the storage mechanism of CAM is very different from RAM. Figure 1 is a block diagram of the MCM69C232. In the figure, MCM69C232 does not have an address bus for determining the content storage unit. Its address lines A0~A2 are used to address the on-chip control register. The processor can read/write data items in the CAM table by operating the control port (data lines DQ0~DQl5) of MCM69C232. The storage address of the data item is controlled by the chip's internal logic. MCM69C232 has two working modes: ATM mode and basic mode. The ATM mode is mainly used for ATM switches to convert the virtual path identification number/virtual channel identification number (VPI/VCI) of ATM cells; the basic mode is mainly used for data retrieval such as IP/MAC address matching on Ethernet. The
main features of the MCM69C232 chip are as follows:
◇160 ns matching time;
◇With mask registers;
◇Extended depth through chip cascading;
◇The clock frequency is up to 50 MHz;
◇The matching word width and output result bit width can be customized;
◇In ATM mode, VPC (Virtual Path Circuits) and VCC (Virtual Connection Circuits) can be matched simultaneously;
◇The ports are mainly divided into control and matching ports;
◇20Ons insertion time (when the queue of 12 input data items is not full);
◇12ms initialization time (after setting the fast write mode);
◇It has a test port (JTAG) that complies with IEEE Standard 1149.1.
2 Use of MCM69C232 chip
In basic operation mode, MCM69C232 reads input data and compares it with all entries in the CAM table. Regardless of whether a match is found or not, when the comparison is completed, the MC (Match Complete) pin is valid. If a match is found, the MS (Mateh Successful) pin is valid, and the data related to the matching data item is output on the MQ bus; if not found, the MQ bus remains in a high impedance state so that cascading CAM chips can expand the storage depth.
After the MCM69C232 is powered on, the default operating mode is basic mode. Before entering the data retrieval operation, the chip must complete several startup operation processes: first, set the global mask register to define the match word width and output result bit width; second, select the write mode of the data table item, that is, fast write mode or dynamic write mode; third, load the data items required by the user (a total of 64 bits, including the match byte and the corresponding output result byte) into the CAM table one by one.
The choice of the write mode of the CAM table data item is often a balance between the write speed and the time spent on starting the match operation. The fast write mode is often used to initially write a large number of data items into the CAM table; while the dynamic write mode is often used to insert a small number of data items into the CAM table after starting the match. The user inserts or deletes CAM table items by operating the 4 I/O registers of the control port. When an abnormal state occurs, it can be reflected from the flag register and the error code register. The registers inside the MCM69C232 are shown in Figure 2. The
match bit of the CAM table depends on the definition of the global mask register. The bit of the mask register that is 0 requires the corresponding bit of the data item to be matched; if it is 1, the corresponding bit does not need to be matched. In typical applications, users always define the high-order bit of the data item as "byte to be matched" and the low-order bit as "result output byte". Any bit in the 64-bit can be defined as a "match operation", but in fact, the output to the match port MQ0~MQ31 bus is always the lowest 32-bit data, which cannot be arbitrarily programmed. If the output result byte set exceeds 32 bits, it is meaningless. [page]
Normally, the MCM69C232 prepares for the match operation by writing control port data and instructions. The general procedure is to load the data item into the four I/O registers, and then write the operation code into the operation code register to complete the operation of an instruction. After the instruction is completed, the content of the CAM table may be modified, the corresponding bit of the flag register will be set, the error code register will return the error code, and when enabled, an interrupt will be triggered. The operation instructions of the chip are listed in Table 1.
Reset. The reset is synchronized with the rising edge of the main clock. A reset of one clock cycle can clear the CAM table and the input data item queue, set the flag register to 1C, the error code register to FFFF, the almost full register to FFF, and clear the interrupt mask. Control port timing. Accessing the control port is like the processor accessing RAM, and the timing is relatively simple. [page] Match port timing
. There are two cases for accessing the match port: one is that the match byte is less than or equal to 32 bits, only the LH/SM signal is used to load the match data, and the LL signal is useless; the other is that the match byte is greater than 32 bits, the LL signal is used to load the low-order part of the match data first, and then the LH/SM signal is used to load the high-order part. The matching result is indicated by the MC signal and the MS signal, and the G signal is enabled to read the matching result data. For the timing of the matching port, see the reference.
The two ports are matched simultaneously. When the control port simulation matching and the matching port matching are performed simultaneously, the matching port has a higher priority. In addition, the input queue must be empty before the control port simulation matching operation in order to receive the result. Depth expansion. The depth can be expanded by simply cascading the chips. For the specific expansion connection method, see the reference.
3 Application of MCM69C232 chip
3.1 Application of MCM69C232 in switches
On Ethernet. The switch maintains an address table for Layer 2 switching (usually called a "CAM table"), which maintains the correspondence between MAC addresses and outbound interfaces. Whenever an Ethernet data frame is received, the switch will make a judgment. If the data frame is not sent to itself, the CAM table is queried according to the destination MAC address of the data frame; if it can be hit (the so-called hit is to find the forwarding item corresponding to the MAC address in the CAM table), it is forwarded according to the query result (usually an outbound interface list); if it cannot be hit, the data frame is broadcast to all ports.
The CAM table of the switch can be obtained in many ways, such as static configuration and dynamic learning. For multicast, it can also be obtained through various multicast protocols (such as IGMP snooping, GMRP protocol, etc.) (the multicast forwarding table cannot be obtained through learning, and the multicast forwarding items are different from ordinary forwarding items. The corresponding outlet may not be just one, but a set of outlets); but for unicast, the most important way to establish it is dynamic learning.
When the switch receives a data frame, it extracts the destination MAC address of the data frame and uses it as a basis for querying the CAM table. If the result can be found, the data frame is forwarded according to the result; if it cannot be found, it is copied to all ports except the receiving port. While forwarding data, the switch also performs a learning process. It extracts the source MAC address of the data frame and queries the CAM table to see if there is a forwarding item for the MAC address in the CAM table. If not, the MAC address is bound to the port that receives the MAC address and inserted into the CAM table entry. In this way, when a data frame sent to the MAC address is received, it does not need to be broadcast to all ports, but only sent to this port. It should be noted that the forwarding of data frames is based on the query of the CAM table based on the destination MAC address, while the learning of the CAM table is based on the source MAC address.
The reason why CAM is used in switches is that switches have particularly high performance requirements. The performance of the embedded real-time control system in the switch mainly depends on two aspects: the computing performance of the hardware platform and the superiority of the algorithm. Among them, the computing performance of the hardware platform is the most critical, which is particularly prominent in the switch. According to the design requirements, the retrieval time of the MAC address of the Ethernet frame is generally at the μs level, so the response speed of the data retrieval task must be guaranteed first; in addition to the very heavy data retrieval task, the switch must also complete the SNMP (Simple Network Management Pmtocol) protocol processing, command line processing and other tasks, so the problem of data retrieval occupying system resources must also be solved. It is not complicated to use software to implement the retrieval of the MAC address of the Ethernet frame, but due to the frequent retrieval times, a large amount of system resources are occupied, which greatly reduces the response speed of the system and cannot meet the requirements of large-volume data communication. Therefore, the pure software algorithm cannot solve the problem of the data retrieval part occupying a large amount of resources. In order to improve the response speed of the system, the data retrieval task must be separated and implemented by hardware, while the protocol processing part is still completed by the CPU. The data retrieval module and the protocol processing module work in parallel. Using hardware to implement data retrieval can also improve the retrieval speed and reduce the occupancy rate of system resources. Here the advantages of CAM are reflected.
3.2 Retrieval operation
When performing MAC address retrieval, the CPU first uses the MAC address as the keyword to retrieve the corresponding index value through the MAC-CAM table, and then finds the storage location of the relevant information corresponding to the MAC address in the RAM table according to the index value, and obtains the relevant configuration information from this address. Other information such as MAC address, user port, and valid flag field can be stored in the relevant configuration information in RAM. The mapping relationship between the CAM table and RAM is shown in Figure 3.
According to the protocol, the MAC address occupies 48 bits and is represented as a 6-byte array. Therefore, for the matching operation of the MAC address, the mask word is set to 0x0000_0000_0000_FFFF, that is, 48-bit matching. The setting of the mask word must be completed when the CAM is initialized. Before performing the matching operation, the CAM must be initialized. After the MCM69C232 is powered on, the default working mode is the basic mode, so there is no need to set the working mode. As mentioned above, the formation of the MAC table in the CAM is obtained through self-learning, so there is no need to write data items to the CAM table.
The matching operation is completed by reading/writing the matching port. The matching port data line MQ is only 32 bits. Since the MAC address occupies 48 bits, two write operations are required to fully express a MAC address. When performing MAC address retrieval, the CPU first writes the lower 32 bits of the MAC address to the matching port, of which the upper 16 bits are valid and the lower 16 bits can be any value; then the CPU writes the upper 32 bits to the matching port; then the CPU reads the matching port to obtain the matching result.
Conclusion
The use of content addressable memory MCM69C232 greatly improves the data retrieval speed. This is incomparable to the pure software retrieval algorithm. The data processing capability of the equipment meets the requirements of large-flow network communication, so that the product has achieved good social and economic benefits.
Keywords:MCM69C232
Reference address:Content addressable memory MCM69C232 and its application
1 Introduction to MCM69C232 chip
Content-addressable memory (CAM) is essentially a special memory based on RAM technology. Data items are stored in array units inside CAM. The number of bits of each data item is called "word width", and the number of all data items in the array is called "depth". The capacity of CAM is characterized by word width and depth. MCM69C232 is designed to store 4096 data items with a width of 64 bits.
MCM69C232 has two sets of data ports: control port and match port. The control port is used by the processor (CPU) to operate the CAM table, including inserting and deleting data table items, mode setting and analog matching, and reading information from the chip's internal status register. The retrieval of data items is completed through the match port.
Although based on RAM technology, the storage mechanism of CAM is very different from RAM. Figure 1 is a block diagram of the MCM69C232. In the figure, MCM69C232 does not have an address bus for determining the content storage unit. Its address lines A0~A2 are used to address the on-chip control register. The processor can read/write data items in the CAM table by operating the control port (data lines DQ0~DQl5) of MCM69C232. The storage address of the data item is controlled by the chip's internal logic. MCM69C232 has two working modes: ATM mode and basic mode. The ATM mode is mainly used for ATM switches to convert the virtual path identification number/virtual channel identification number (VPI/VCI) of ATM cells; the basic mode is mainly used for data retrieval such as IP/MAC address matching on Ethernet. The
main features of the MCM69C232 chip are as follows:
◇160 ns matching time;
◇With mask registers;
◇Extended depth through chip cascading;
◇The clock frequency is up to 50 MHz;
◇The matching word width and output result bit width can be customized;
◇In ATM mode, VPC (Virtual Path Circuits) and VCC (Virtual Connection Circuits) can be matched simultaneously;
◇The ports are mainly divided into control and matching ports;
◇20Ons insertion time (when the queue of 12 input data items is not full);
◇12ms initialization time (after setting the fast write mode);
◇It has a test port (JTAG) that complies with IEEE Standard 1149.1.
2 Use of MCM69C232 chip
In basic operation mode, MCM69C232 reads input data and compares it with all entries in the CAM table. Regardless of whether a match is found or not, when the comparison is completed, the MC (Match Complete) pin is valid. If a match is found, the MS (Mateh Successful) pin is valid, and the data related to the matching data item is output on the MQ bus; if not found, the MQ bus remains in a high impedance state so that cascading CAM chips can expand the storage depth.
After the MCM69C232 is powered on, the default operating mode is basic mode. Before entering the data retrieval operation, the chip must complete several startup operation processes: first, set the global mask register to define the match word width and output result bit width; second, select the write mode of the data table item, that is, fast write mode or dynamic write mode; third, load the data items required by the user (a total of 64 bits, including the match byte and the corresponding output result byte) into the CAM table one by one.
The choice of the write mode of the CAM table data item is often a balance between the write speed and the time spent on starting the match operation. The fast write mode is often used to initially write a large number of data items into the CAM table; while the dynamic write mode is often used to insert a small number of data items into the CAM table after starting the match. The user inserts or deletes CAM table items by operating the 4 I/O registers of the control port. When an abnormal state occurs, it can be reflected from the flag register and the error code register. The registers inside the MCM69C232 are shown in Figure 2. The
match bit of the CAM table depends on the definition of the global mask register. The bit of the mask register that is 0 requires the corresponding bit of the data item to be matched; if it is 1, the corresponding bit does not need to be matched. In typical applications, users always define the high-order bit of the data item as "byte to be matched" and the low-order bit as "result output byte". Any bit in the 64-bit can be defined as a "match operation", but in fact, the output to the match port MQ0~MQ31 bus is always the lowest 32-bit data, which cannot be arbitrarily programmed. If the output result byte set exceeds 32 bits, it is meaningless. [page]
Normally, the MCM69C232 prepares for the match operation by writing control port data and instructions. The general procedure is to load the data item into the four I/O registers, and then write the operation code into the operation code register to complete the operation of an instruction. After the instruction is completed, the content of the CAM table may be modified, the corresponding bit of the flag register will be set, the error code register will return the error code, and when enabled, an interrupt will be triggered. The operation instructions of the chip are listed in Table 1.
Reset. The reset is synchronized with the rising edge of the main clock. A reset of one clock cycle can clear the CAM table and the input data item queue, set the flag register to 1C, the error code register to FFFF, the almost full register to FFF, and clear the interrupt mask. Control port timing. Accessing the control port is like the processor accessing RAM, and the timing is relatively simple. [page] Match port timing
. There are two cases for accessing the match port: one is that the match byte is less than or equal to 32 bits, only the LH/SM signal is used to load the match data, and the LL signal is useless; the other is that the match byte is greater than 32 bits, the LL signal is used to load the low-order part of the match data first, and then the LH/SM signal is used to load the high-order part. The matching result is indicated by the MC signal and the MS signal, and the G signal is enabled to read the matching result data. For the timing of the matching port, see the reference.
The two ports are matched simultaneously. When the control port simulation matching and the matching port matching are performed simultaneously, the matching port has a higher priority. In addition, the input queue must be empty before the control port simulation matching operation in order to receive the result. Depth expansion. The depth can be expanded by simply cascading the chips. For the specific expansion connection method, see the reference.
3 Application of MCM69C232 chip
3.1 Application of MCM69C232 in switches
On Ethernet. The switch maintains an address table for Layer 2 switching (usually called a "CAM table"), which maintains the correspondence between MAC addresses and outbound interfaces. Whenever an Ethernet data frame is received, the switch will make a judgment. If the data frame is not sent to itself, the CAM table is queried according to the destination MAC address of the data frame; if it can be hit (the so-called hit is to find the forwarding item corresponding to the MAC address in the CAM table), it is forwarded according to the query result (usually an outbound interface list); if it cannot be hit, the data frame is broadcast to all ports.
The CAM table of the switch can be obtained in many ways, such as static configuration and dynamic learning. For multicast, it can also be obtained through various multicast protocols (such as IGMP snooping, GMRP protocol, etc.) (the multicast forwarding table cannot be obtained through learning, and the multicast forwarding items are different from ordinary forwarding items. The corresponding outlet may not be just one, but a set of outlets); but for unicast, the most important way to establish it is dynamic learning.
When the switch receives a data frame, it extracts the destination MAC address of the data frame and uses it as a basis for querying the CAM table. If the result can be found, the data frame is forwarded according to the result; if it cannot be found, it is copied to all ports except the receiving port. While forwarding data, the switch also performs a learning process. It extracts the source MAC address of the data frame and queries the CAM table to see if there is a forwarding item for the MAC address in the CAM table. If not, the MAC address is bound to the port that receives the MAC address and inserted into the CAM table entry. In this way, when a data frame sent to the MAC address is received, it does not need to be broadcast to all ports, but only sent to this port. It should be noted that the forwarding of data frames is based on the query of the CAM table based on the destination MAC address, while the learning of the CAM table is based on the source MAC address.
The reason why CAM is used in switches is that switches have particularly high performance requirements. The performance of the embedded real-time control system in the switch mainly depends on two aspects: the computing performance of the hardware platform and the superiority of the algorithm. Among them, the computing performance of the hardware platform is the most critical, which is particularly prominent in the switch. According to the design requirements, the retrieval time of the MAC address of the Ethernet frame is generally at the μs level, so the response speed of the data retrieval task must be guaranteed first; in addition to the very heavy data retrieval task, the switch must also complete the SNMP (Simple Network Management Pmtocol) protocol processing, command line processing and other tasks, so the problem of data retrieval occupying system resources must also be solved. It is not complicated to use software to implement the retrieval of the MAC address of the Ethernet frame, but due to the frequent retrieval times, a large amount of system resources are occupied, which greatly reduces the response speed of the system and cannot meet the requirements of large-volume data communication. Therefore, the pure software algorithm cannot solve the problem of the data retrieval part occupying a large amount of resources. In order to improve the response speed of the system, the data retrieval task must be separated and implemented by hardware, while the protocol processing part is still completed by the CPU. The data retrieval module and the protocol processing module work in parallel. Using hardware to implement data retrieval can also improve the retrieval speed and reduce the occupancy rate of system resources. Here the advantages of CAM are reflected.
3.2 Retrieval operation
When performing MAC address retrieval, the CPU first uses the MAC address as the keyword to retrieve the corresponding index value through the MAC-CAM table, and then finds the storage location of the relevant information corresponding to the MAC address in the RAM table according to the index value, and obtains the relevant configuration information from this address. Other information such as MAC address, user port, and valid flag field can be stored in the relevant configuration information in RAM. The mapping relationship between the CAM table and RAM is shown in Figure 3.
According to the protocol, the MAC address occupies 48 bits and is represented as a 6-byte array. Therefore, for the matching operation of the MAC address, the mask word is set to 0x0000_0000_0000_FFFF, that is, 48-bit matching. The setting of the mask word must be completed when the CAM is initialized. Before performing the matching operation, the CAM must be initialized. After the MCM69C232 is powered on, the default working mode is the basic mode, so there is no need to set the working mode. As mentioned above, the formation of the MAC table in the CAM is obtained through self-learning, so there is no need to write data items to the CAM table.
The matching operation is completed by reading/writing the matching port. The matching port data line MQ is only 32 bits. Since the MAC address occupies 48 bits, two write operations are required to fully express a MAC address. When performing MAC address retrieval, the CPU first writes the lower 32 bits of the MAC address to the matching port, of which the upper 16 bits are valid and the lower 16 bits can be any value; then the CPU writes the upper 32 bits to the matching port; then the CPU reads the matching port to obtain the matching result.
Conclusion
The use of content addressable memory MCM69C232 greatly improves the data retrieval speed. This is incomparable to the pure software retrieval algorithm. The data processing capability of the equipment meets the requirements of large-flow network communication, so that the product has achieved good social and economic benefits.
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