AT89S52 MCU memory structure

Publisher:colcheryLatest update time:2015-03-24 Source: diangonKeywords:AT89S52 Reading articles on mobile phones Scan QR code
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 The memory structure of the AT89S52 microcontroller is divided into four parts: on-chip program memory, off-chip program memory, on-chip data memory, and off-chip data memory.
1. Program memory
   The program written by the designer is stored in the program memory of the microprocessor.
   The AT89S52 has a 64KB program memory addressing space, which is used to store user programs, data, tables and other information. The structure of the program memory is shown in Figure 1.

 


Figure 1 Structure of AT89S52 program memory

 

  The on-chip and off-chip program memories of AT89S52 are in a unified logical space, with addresses from 0000H to FFFFH, with a total range of 64K bytes. When the pin is connected to a high level, the program starts to execute from the on-chip program memory 0000H, that is, accessing the on-chip memory. When the PC value exceeds the on-chip ROM capacity, it will automatically turn to the off-chip program memory space for execution. When the pin is connected to a low level, it forces the system to execute all the programs stored in the off-chip program memory starting from 0000H.
2. Data memory
  AT89S52 has 256 bytes of on-chip data memory. The address is 00H~FFH. These 256 units are divided into two parts. One is the user data RAM with addresses from 00H to 7FH (a total of 128 bytes). The address unit from 80H to FFH (also 128 bytes) is the special register (SFR) unit. The upper 128 bytes overlap with the special function register, that is, the upper 128 bytes have the same address as the special function register, but are physically separated.
  The 32 units from 00H to 1FH are evenly divided into four blocks, each containing eight 8-bit registers, all named R0 to R7, and these registers are called general registers. The registers in these four blocks are all called R0 to R7, and these four groups of general registers can be selected using the 3rd and 4th bits (RS0 and RS1) of PSW. The
  20H-2FH units of the internal data memory are bit addressing areas, which can be used as general units with byte addressing, or their bits can be addressed. The bit addressing area addresses are shown in Table 1

 


Table 1 RAM bit addressing area address table

 

3. The entry address of the interrupt service program 
   In the program storage area, a section of the entry address of the interrupt service program is saved for the interrupt service program: one group of special units is 0003H-0032H, each unit has its own purpose, they are divided into six sections, each section is 8 bytes, specially reserved for the interrupt service program, called the interrupt vector area. AT89S52 has a total of 8 interrupt sources and 6 interrupt vectors, their definitions are shown in Table 2 below,

 


Table 2 Entry address of interrupt service routine

 

4. Special Function Register SFR (Special Function Register)
   Special function registers refer to a set of registers with special purposes, also known as dedicated registers. In essence, they are some on-chip RAM units with special functions, reflecting the operating status of the microcontroller. Many functions are also defined and controlled by special function registers. The
   high 128 (80~FFH) addresses inside the AT89S52 microcontroller are allocated to special function registers. This address space completely overlaps with the high 128-byte address of the data memory in the chip, but the two are completely independent in physical hardware. The addressing method is used to distinguish this completely overlapping address space. When using direct addressing to access this address space, the special function registers are accessed; when using indirect addressing to access this address space, the data memory is accessed.
   AT89S52 has 32 special function registers, which are discretely distributed in the 80H~FFH addresses of the internal RAM. These registered functions have been specially specified and the user cannot modify their structure.

 

5. Several issues to note
(1) Address overlap
   All memories in a single-chip microcomputer must be assigned addresses. The addressable address range is 64KB. Data memory and program memory occupy the same address.
The low 4KB addresses of 0000H to 0FFFFH on and off the chip in the program memory completely overlap, but we use pins to distinguish them: when = 0, select the off-chip, when = 1, select the on-chip, so that they are completely distinguished. The 256 unit addresses
    of 0000H to 00FFH on and off the chip in the data memory completely overlap. Different instructions are used to distinguish the access to on-chip and off-chip data: MOV instructions access the on-chip data memory, and MOVX instructions access the off-chip data memory. 
(2) The distinction between program memory (ROM) and data memory (RAM)
   The distinction between program memory (ROM) and data memory (RAM) is strictly distinguished in use. The program memory can only store program instructions and constant tables. The MOVC instruction can only be used to access data in the program memory. The data memory stores data, and the on-chip and off-chip operation instructions are operated by MOV and MOVX respectively.
(3) The area division of the bit address space is
   the 128 bits from 20H to 2FH in the on-chip RAM and the bit addresses in the SFR. These bit addressing units and the bit instruction set constitute the bit processor system. 
Keywords:AT89S52 Reference address:AT89S52 MCU memory structure

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